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Message-Id: <20241105-tps25990-v4-4-0e312ac70b62@baylibre.com>
Date: Tue, 05 Nov 2024 18:58:41 +0100
From: Jerome Brunet <jbrunet@...libre.com>
To: Jean Delvare <jdelvare@...e.com>, Guenter Roeck <linux@...ck-us.net>,
Jonathan Corbet <corbet@....net>,
Patrick Rudolph <patrick.rudolph@...ements.com>,
Naresh Solanki <naresh.solanki@...ements.com>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Jerome Brunet <jbrunet@...libre.com>,
Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>
Cc: linux-hwmon@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org, devicetree@...r.kernel.org,
linux-i2c@...r.kernel.org
Subject: [PATCH v4 4/7] hwmon: (pmbus/core) add wp module param
Add a module parameter to force the write protection mode of pmbus chips.
4 protections modes are provided to start with:
* 0: Remove the write protection
* 1: Disable all writes except to the WRITE_PROTECT, OPERATION,
PAGE, ON_OFF_CONFIG and VOUT_COMMAND commands
* 2: Disable all writes except to the WRITE_PROTECT, OPERATION and
PAGE commands
* 3: Disable all writes except to the WRITE_PROTECT command
Of course, if the parameter is not provided, the default write protection
status of the pmbus chips is left untouched.
Suggested-by: Guenter Roeck <linux@...ck-us.net>
Signed-off-by: Jerome Brunet <jbrunet@...libre.com>
---
Documentation/hwmon/pmbus-core.rst | 21 +++++++++++++++++++++
drivers/hwmon/pmbus/pmbus_core.c | 29 +++++++++++++++++++++++++++++
2 files changed, 50 insertions(+)
diff --git a/Documentation/hwmon/pmbus-core.rst b/Documentation/hwmon/pmbus-core.rst
index 0a251960f8910ffb121d82b45e729d06f98424ef..fdfb237731486ce9977b337586333d28f7419d1d 100644
--- a/Documentation/hwmon/pmbus-core.rst
+++ b/Documentation/hwmon/pmbus-core.rst
@@ -387,3 +387,24 @@ PMBUS_VOUT_PROTECTED
Set if the chip VOUT_COMMAND command is protected and protection is not
determined by the standard WRITE_PROTECT command.
+
+Module parameter
+----------------
+
+pmbus_core.wp: PMBus write protect forced mode
+
+PMBus may come up with a variety of write protection configuration.
+'pmbus_core.wp' may be used if a particular write protection is necessary.
+The ability to actually alter the protection may also depend on the chip
+so the actual runtime write protection configuration may differ from
+the requested one. pmbus_core currently support the following value:
+
+* 0: write protection removed.
+* 1: Disable all writes except to the WRITE_PROTECT, OPERATION,
+ PAGE, ON_OFF_CONFIG and VOUT_COMMAND commands.
+* 2: Disable all writes except to the WRITE_PROTECT, OPERATION and
+ PAGE commands.
+* 3: Disable all writes except to the WRITE_PROTECT command. Note that
+ protection should include the PAGE register. This may be problematic
+ for multi-page chips, if the chips strictly follows the PMBus
+ specification, preventing the chip from changing the active page.
diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c
index 51348803ff842c442c711338bab928a54b4d0d9a..d355e3fb0d6b7bea392c7dd5551a1c904a05f21b 100644
--- a/drivers/hwmon/pmbus/pmbus_core.c
+++ b/drivers/hwmon/pmbus/pmbus_core.c
@@ -31,6 +31,9 @@
#define PMBUS_ATTR_ALLOC_SIZE 32
#define PMBUS_NAME_SIZE 24
+static int wp = -1;
+module_param(wp, int, 0444);
+
struct pmbus_sensor {
struct pmbus_sensor *next;
char name[PMBUS_NAME_SIZE]; /* sysfs sensor name */
@@ -2669,6 +2672,32 @@ static void pmbus_init_wp(struct i2c_client *client, struct pmbus_data *data)
{
int ret;
+ switch (wp) {
+ case 0:
+ _pmbus_write_byte_data(client, 0xff,
+ PMBUS_WRITE_PROTECT, 0);
+ break;
+
+ case 1:
+ _pmbus_write_byte_data(client, 0xff,
+ PMBUS_WRITE_PROTECT, PB_WP_VOUT);
+ break;
+
+ case 2:
+ _pmbus_write_byte_data(client, 0xff,
+ PMBUS_WRITE_PROTECT, PB_WP_OP);
+ break;
+
+ case 3:
+ _pmbus_write_byte_data(client, 0xff,
+ PMBUS_WRITE_PROTECT, PB_WP_ALL);
+ break;
+
+ default:
+ /* Ignore the other values */
+ break;
+ }
+
ret = _pmbus_read_byte_data(client, 0xff, PMBUS_WRITE_PROTECT);
if (ret < 0)
return;
--
2.45.2
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