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Message-ID: <790cbc97-6a08-495c-9afd-b8a49e546241@lunn.ch>
Date: Tue, 5 Nov 2024 19:15:27 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Oleksij Rempel <o.rempel@...gutronix.de>
Cc: "David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Florian Fainelli <f.fainelli@...il.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Vladimir Oltean <olteanv@...il.com>,
	Woojung Huh <woojung.huh@...rochip.com>,
	Arun Ramadoss <arun.ramadoss@...rochip.com>,
	Conor Dooley <conor+dt@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Rob Herring <robh+dt@...nel.org>, kernel@...gutronix.de,
	linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
	UNGLinuxDriver@...rochip.com,
	"Russell King (Oracle)" <linux@...linux.org.uk>,
	devicetree@...r.kernel.org, Marek Vasut <marex@...x.de>
Subject: Re: [PATCH net-next v3 3/6] net: dsa: microchip: Refactor MDIO
 handling for side MDIO access

On Tue, Nov 05, 2024 at 10:09:41AM +0100, Oleksij Rempel wrote:
> Add support for accessing PHYs via a side MDIO interface in LAN937x
> switches. The existing code already supports accessing PHYs via main
> management interfaces, which can be SPI, I2C, or MDIO, depending on the
> chip variant. This patch enables using a side MDIO bus, where SPI is
> used for the main switch configuration and MDIO for managing the
> integrated PHYs. On LAN937x, this is optional, allowing them to operate
> in both configurations: SPI only, or SPI + MDIO. Typically, the SPI
> interface is used for switch configuration, while MDIO handles PHY
> management.
> 
> Additionally, update interrupt controller code to support non-linear
> port to PHY address mapping, enabling correct interrupt handling for
> configurations where PHY addresses do not directly correspond to port
> indexes. This change ensures that the interrupt mechanism properly
> aligns with the new, flexible PHY address mappings introduced by side
> MDIO support.
> 
> Signed-off-by: Oleksij Rempel <o.rempel@...gutronix.de>

Reviewed-by: Andrew Lunn <andrew@...n.ch>

    Andrew

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