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Message-Id: <20241105193212.2082-1-jiashengjiangcool@gmail.com>
Date: Tue, 5 Nov 2024 19:32:12 +0000
From: Jiasheng Jiang <jiashengjiangcool@...il.com>
To: jic23@...nel.org,
lars@...afoo.de,
mcoquelin.stm32@...il.com,
alexandre.torgue@...s.st.com,
u.kleine-koenig@...libre.com,
tgamblin@...libre.com,
fabrice.gasnier@...com,
benjamin.gaignard@...aro.org,
lee@...nel.org
Cc: linux-iio@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Jiasheng Jiang <jiashengjiangcool@...il.com>
Subject: [PATCH] iio: trigger: stm32-timer-trigger: Add check for clk_enable()
Add check for the return value of clk_enable() in order to catch the
potential exception.
Fixes: 3192ade7b6f6 ("iio: trigger: stm32-timer: enable clock when in master mode")
Fixes: 90938ca432e6 ("iio: trigger: stm32-timer: add enable attribute")
Fixes: 93fbe91b5521 ("iio: Add STM32 timer trigger driver")
Signed-off-by: Jiasheng Jiang <jiashengjiangcool@...il.com>
---
drivers/iio/trigger/stm32-timer-trigger.c | 40 +++++++++++++++++++----
1 file changed, 33 insertions(+), 7 deletions(-)
diff --git a/drivers/iio/trigger/stm32-timer-trigger.c b/drivers/iio/trigger/stm32-timer-trigger.c
index 0684329956d9..0d5bb808c61d 100644
--- a/drivers/iio/trigger/stm32-timer-trigger.c
+++ b/drivers/iio/trigger/stm32-timer-trigger.c
@@ -119,7 +119,7 @@ static int stm32_timer_start(struct stm32_timer_trigger *priv,
unsigned int frequency)
{
unsigned long long prd, div;
- int prescaler = 0;
+ int prescaler = 0, ret;
u32 ccer;
/* Period and prescaler values depends of clock rate */
@@ -153,7 +153,13 @@ static int stm32_timer_start(struct stm32_timer_trigger *priv,
mutex_lock(&priv->lock);
if (!priv->enabled) {
priv->enabled = true;
- clk_enable(priv->clk);
+ ret = clk_enable(priv->clk);
+ if (ret) {
+ mutex_unlock(&priv->lock);
+ return dev_err_probe(priv->dev, ret,
+ "failed to enable clock: %d\n",
+ ret);
+ }
}
regmap_write(priv->regmap, TIM_PSC, prescaler);
@@ -307,7 +313,7 @@ static ssize_t stm32_tt_store_master_mode(struct device *dev,
struct stm32_timer_trigger *priv = dev_get_drvdata(dev);
struct iio_trigger *trig = to_iio_trigger(dev);
u32 mask, shift, master_mode_max;
- int i;
+ int i, ret;
if (stm32_timer_is_trgo2_name(trig->name)) {
mask = TIM_CR2_MMS2;
@@ -326,7 +332,13 @@ static ssize_t stm32_tt_store_master_mode(struct device *dev,
if (!priv->enabled) {
/* Clock should be enabled first */
priv->enabled = true;
- clk_enable(priv->clk);
+ ret = clk_enable(priv->clk);
+ if (ret) {
+ mutex_unlock(&priv->lock);
+ return dev_err_probe(priv->dev, ret,
+ "failed to enable clock: %d\n",
+ ret);
+ }
}
regmap_update_bits(priv->regmap, TIM_CR2, mask,
i << shift);
@@ -482,6 +494,7 @@ static int stm32_counter_write_raw(struct iio_dev *indio_dev,
int val, int val2, long mask)
{
struct stm32_timer_trigger *priv = iio_priv(indio_dev);
+ int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
@@ -496,7 +509,13 @@ static int stm32_counter_write_raw(struct iio_dev *indio_dev,
if (val) {
if (!priv->enabled) {
priv->enabled = true;
- clk_enable(priv->clk);
+ ret = clk_enable(priv->clk);
+ if (ret) {
+ mutex_unlock(&priv->lock);
+ return dev_err_probe(priv->dev, ret,
+ "failed to enable clock: %d\n",
+ ret);
+ }
}
regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);
} else {
@@ -601,7 +620,7 @@ static int stm32_set_enable_mode(struct iio_dev *indio_dev,
unsigned int mode)
{
struct stm32_timer_trigger *priv = iio_priv(indio_dev);
- int sms = stm32_enable_mode2sms(mode);
+ int sms = stm32_enable_mode2sms(mode), ret;
if (sms < 0)
return sms;
@@ -611,7 +630,14 @@ static int stm32_set_enable_mode(struct iio_dev *indio_dev,
*/
mutex_lock(&priv->lock);
if (sms == 6 && !priv->enabled) {
- clk_enable(priv->clk);
+ ret = clk_enable(priv->clk);
+ if (ret) {
+ mutex_unlock(&priv->lock);
+ return dev_err_probe(priv->dev, ret,
+ "failed to enable clock: %d\n",
+ ret);
+ }
+
priv->enabled = true;
}
mutex_unlock(&priv->lock);
--
2.25.1
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