[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20241105-am65-cpsw-multi-rx-dscp-v1-0-38db85333c88@kernel.org>
Date: Tue, 05 Nov 2024 16:18:09 +0200
From: Roger Quadros <rogerq@...nel.org>
To: Siddharth Vadapalli <s-vadapalli@...com>,
Andrew Lunn <andrew+netdev@...n.ch>,
"David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Simon Horman <horms@...nel.org>
Cc: linux-omap@...r.kernel.org, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, srk@...com, Pekka Varis <p-varis@...com>,
Roger Quadros <rogerq@...nel.org>
Subject: [PATCH net-next 0/2] net: ethernet: ti: am65-cpsw: enable DSCP to
priority map for RX
Configure DSCP to Priority mapping registers so that IP precedence
field (top 3 bits of DSCP) map it to one of the 8 priority queues
for RX traffic.
Also update Priority to Thread maping to be compliant with
IEEE802.1Q-2004. Priority Code Point (PCP) 2 is higher priority than
PCP 0 (Best Effort). PCP 1 (Background) is lower priority than
PCP 0 (Best Effort).
Signed-off-by: Roger Quadros <rogerq@...nel.org>
---
Roger Quadros (2):
net: ethernet: ti: am65-cpsw: update pri_thread_map as per IEEE802.1Q-2004
net: ethernet: ti: am65-cpsw: enable DSCP to priority map for RX
drivers/net/ethernet/ti/am65-cpsw-nuss.c | 50 ++++++++++++++++++++++++++++++++
drivers/net/ethernet/ti/cpsw_ale.c | 25 +++++++++-------
2 files changed, 64 insertions(+), 11 deletions(-)
---
base-commit: 42f7652d3eb527d03665b09edac47f85fb600924
change-id: 20241101-am65-cpsw-multi-rx-dscp-000b2c4af6d0
Best regards,
--
Roger Quadros <rogerq@...nel.org>
Powered by blists - more mailing lists