linux-kernel - RE: [PATCH v15 13/15] cxl/memfeature: Add CXL memory device sPPR control feature

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Message-ID: <987130b3079d4afcbe67b04627e619a1@huawei.com>
Date: Wed, 6 Nov 2024 17:28:44 +0000
From: Shiju Jose <shiju.jose@...wei.com>
To: Dave Jiang <dave.jiang@...el.com>, "linux-edac@...r.kernel.org"
	<linux-edac@...r.kernel.org>, "linux-cxl@...r.kernel.org"
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	Linuxarm <linuxarm@...wei.com>
Subject: RE: [PATCH v15 13/15] cxl/memfeature: Add CXL memory device sPPR
 control feature


>-----Original Message-----
>From: Dave Jiang <dave.jiang@...el.com>
>Sent: 05 November 2024 20:32
>To: Shiju Jose <shiju.jose@...wei.com>; linux-edac@...r.kernel.org; linux-
>cxl@...r.kernel.org; linux-acpi@...r.kernel.org; linux-mm@...ck.org; linux-
>kernel@...r.kernel.org
>Cc: bp@...en8.de; tony.luck@...el.com; rafael@...nel.org; lenb@...nel.org;
>mchehab@...nel.org; dan.j.williams@...el.com; dave@...olabs.net; Jonathan
>Cameron <jonathan.cameron@...wei.com>; gregkh@...uxfoundation.org;
>sudeep.holla@....com; jassisinghbrar@...il.com; alison.schofield@...el.com;
>vishal.l.verma@...el.com; ira.weiny@...el.com; david@...hat.com;
>Vilas.Sridharan@....com; leo.duran@....com; Yazen.Ghannam@....com;
>rientjes@...gle.com; jiaqiyan@...gle.com; Jon.Grimm@....com;
>dave.hansen@...ux.intel.com; naoya.horiguchi@....com;
>james.morse@....com; jthoughton@...gle.com; somasundaram.a@....com;
>erdemaktas@...gle.com; pgonda@...gle.com; duenwen@...gle.com;
>gthelen@...gle.com; wschwartz@...erecomputing.com;
>dferguson@...erecomputing.com; wbs@...amperecomputing.com;
>nifan.cxl@...il.com; tanxiaofei <tanxiaofei@...wei.com>; Zengtao (B)
><prime.zeng@...ilicon.com>; Roberto Sassu <roberto.sassu@...wei.com>;
>kangkang.shen@...urewei.com; wanghuiqiang <wanghuiqiang@...wei.com>;
>Linuxarm <linuxarm@...wei.com>
>Subject: Re: [PATCH v15 13/15] cxl/memfeature: Add CXL memory device sPPR
>control feature
>
>
>
>On 11/1/24 2:17 AM, shiju.jose@...wei.com wrote:
>> From: Shiju Jose <shiju.jose@...wei.com>
>>
>> Post Package Repair (PPR) maintenance operations may be supported by
>> CXL devices that implement CXL.mem protocol. A PPR maintenance
>> operation requests the CXL device to perform a repair operation on its media.
>> For example, a CXL device with DRAM components that support PPR
>> features may implement PPR Maintenance operations. DRAM components
>may
>> support two types of PPR: Hard PPR (hPPR), for a permanent row repair,
>> and Soft PPR (sPPR), for a temporary row repair. sPPR is much faster
>> than hPPR, but the repair is lost with a power cycle.
>>
[...]
>> +enum cxl_ppr_param {
>> +	CXL_PPR_PARAM_DO_QUERY,
>> +	CXL_PPR_PARAM_DO_PPR,
>> +};
>> +
>> +/* See CXL rev 3.1 @8.2.9.7.2.1 Table 8-113 sPPR Feature Readable
>> +Attributes */
>> +/* See CXL rev 3.1 @8.2.9.7.2.2 Table 8-116 hPPR Feature Readable
>Attributes */
>> +#define	CXL_MEMDEV_PPR_QUERY_RESOURCE_FLAG BIT(0)
>
>Are all the extra spaces after #define intended?

Fixed.
>
>DJ
>
>> +
>> +#define CXL_MEMDEV_PPR_DEVICE_INITIATED_MASK BIT(0) #define
[...]
>> +feat_sppr_done:
>>  	return edac_dev_register(&cxlmd->dev, cxl_dev_name, NULL,
>>  				 num_ras_features, ras_features);  }
>

Thanks,
Shiju