| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20241106-catalina-cpld-ioexp-update-v1-1-3437bcfcb608@gmail.com>
Date: Wed, 06 Nov 2024 16:58:51 +0800
From: Potin Lai <potin.lai.pt@...il.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Joel Stanley <joel@....id.au>,
Andrew Jeffery <andrew@...econstruct.com.au>,
Patrick Williams <patrick@...cx.xyz>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
Potin Lai <potin.lai@...ntatw.com>, Cosmo Chou <cosmo.chou@...ntatw.com>,
Potin Lai <potin.lai.pt@...il.com>
Subject: [PATCH 1/2] ARM: dts: aspeed: catalina: update pdb board cpld
ioexp linename
Update the GPIO linename of each PDB CPLD IO expander based on latest
CPLD firmware.
Signed-off-by: Potin Lai <potin.lai.pt@...il.com>
---
.../dts/aspeed/aspeed-bmc-facebook-catalina.dts | 99 +++++++---------------
1 file changed, 29 insertions(+), 70 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts
index 82835e96317d..10a9fca1b803 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts
@@ -802,26 +802,6 @@ io_expander12: gpio@13 {
gpio-controller;
#gpio-cells = <2>;
};
-
- // PDB CPLD IOEXP 0x14
- io_expander13: gpio@14 {
- compatible = "nxp,pca9555";
- interrupt-parent = <&gpio0>;
- interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
- reg = <0x14>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- // PDB CPLD IOEXP 0x15
- io_expander14: gpio@15 {
- compatible = "nxp,pca9555";
- interrupt-parent = <&gpio0>;
- interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
- reg = <0x15>;
- gpio-controller;
- #gpio-cells = <2>;
- };
};
&i2c15 {
@@ -1040,71 +1020,50 @@ &io_expander8 {
&io_expander9 {
gpio-line-names =
- "LEAK3_DETECT_R","LEAK1_DETECT_R",
- "LEAK2_DETECT_R","LEAK0_DETECT_R",
- "CHASSIS3_LEAK_Q_N_PLD","CHASSIS1_LEAK_Q_N_PLD",
- "CHASSIS2_LEAK_Q_N_PLD","CHASSIS0_LEAK_Q_N_PLD",
- "P12V_AUX_FAN_ALERT_PLD_N","P12V_AUX_FAN_OC_PLD_N",
- "P12V_AUX_FAN_FAULT_PLD_N","LEAK_DETECT_RMC_N_R",
- "RSVD_RMC_GPIO3_R","SMB_RJ45_FIO_TMP_ALERT",
- "","";
+ "wSequence_Latch_State_N","wP12V_N1N2_RUNTIME_FLT_N",
+ "wP12V_FAN_RUNTIME_FLT_N","wP12V_AUX_RUNTIME_FLT_N",
+ "wHost_PERST_SEQPWR_FLT_N","wP12V_N1N2_SEQPWR_FLT_N",
+ "wP12V_FAN_SEQPWR_FLT_N","wP12V_AUX_SEQPWR_FLT_N",
+ "wP12V_RUNTIME_FLT_NIC1_N","wAUX_RUNTIME_FLT_NIC1_N",
+ "wP12V_SEQPWR_FLT_NIC1_N","wAUX_SEQPWR_FLT_NIC1_N",
+ "wP12V_RUNTIME_FLT_NIC0_N","wAUX_RUNTIME_FLT_NIC0_N",
+ "wP12V_SEQPWR_FLT_NIC0_N","wAUX_SEQPWR_FLT_NIC0_N";
};
&io_expander10 {
gpio-line-names =
"FM_P12V_NIC1_FLTB_R_N","FM_P3V3_NIC1_FAULT_R_N",
- "OCP_V3_2_PWRBRK_FROM_HOST_ISO_PLD_N",
- "P12V_AUX_NIC1_SENSE_ALERT_R_N",
"FM_P12V_NIC0_FLTB_R_N","FM_P3V3_NIC0_FAULT_R_N",
- "OCP_SFF_PWRBRK_FROM_HOST_ISO_PLD_N",
- "P12V_AUX_NIC0_SENSE_ALERT_R_N",
+ "P48V_HS2_FAULT_N_PLD","P48V_HS1_FAULT_N_PLD",
+ "P12V_AUX_FAN_OC_PLD_N","P12V_AUX_FAN_FAULT_PLD_N",
+ "","",
+ "","",
+ "","FM_SYS_THROTTLE_N",
+ "OCP_V3_2_PWRBRK_FROM_HOST_ISO_PLD_N",
+ "OCP_SFF_PWRBRK_FROM_HOST_ISO_PLD_N";
+};
+
+&io_expander11 {
+ gpio-line-names =
"P12V_AUX_PSU_SMB_ALERT_R_L","P12V_SCM_SENSE_ALERT_R_N",
+ "P12V_AUX_NIC1_SENSE_ALERT_R_N","P12V_AUX_NIC0_SENSE_ALERT_R_N",
"NODEB_PSU_SMB_ALERT_R_L","NODEA_PSU_SMB_ALERT_R_L",
- "P52V_SENSE_ALERT_PLD_N","P48V_HS2_FAULT_N_PLD",
- "P48V_HS1_FAULT_N_PLD","";
+ "P12V_AUX_FAN_ALERT_PLD_N","P52V_SENSE_ALERT_PLD_N",
+ "PRSNT_RJ45_FIO_N_R","FM_MAIN_PWREN_RMC_EN_ISO_R",
+ "CHASSIS3_LEAK_Q_N_PLD","CHASSIS2_LEAK_Q_N_PLD",
+ "CHASSIS1_LEAK_Q_N_PLD","CHASSIS0_LEAK_Q_N_PLD",
+ "","SMB_RJ45_FIO_TMP_ALERT";
};
-&io_expander11 {
+&io_expander12 {
gpio-line-names =
"FAN_7_PRESENT_N","FAN_6_PRESENT_N",
"FAN_5_PRESENT_N","FAN_4_PRESENT_N",
"FAN_3_PRESENT_N","FAN_2_PRESENT_N",
"FAN_1_PRESENT_N","FAN_0_PRESENT_N",
- "PRSNT_CHASSIS3_LEAK_CABLE_R_N","PRSNT_CHASSIS1_LEAK_CABLE_R_N",
- "PRSNT_CHASSIS2_LEAK_CABLE_R_N","PRSNT_CHASSIS0_LEAK_CABLE_R_N",
- "PRSNT_RJ45_FIO_N_R","PRSNT_HDDBD_POWER_CABLE_N",
- "PRSNT_OSFP_POWER_CABLE_N","";
-};
-
-&io_expander12 {
- gpio-line-names =
- "RST_OCP_V3_1_R_N","NIC0_PERST_N",
- "OCP_SFF_PERST_FROM_HOST_ISO_PLD_N","OCP_SFF_MAIN_PWR_EN",
- "FM_OCP_SFF_PWR_GOOD_PLD","OCP_SFF_AUX_PWR_PLD_EN_R",
- "HP_LVC3_OCP_V3_1_PWRGD_PLD","HP_OCP_V3_1_HSC_PWRGD_PLD_R",
- "RST_OCP_V3_2_R_N","NIC1_PERST_N",
- "OCP_V3_2_PERST_FROM_HOST_ISO_PLD_N","OCP_V3_2_MAIN_PWR_EN",
- "FM_OCP_V3_2_PWR_GOOD_PLD","OCP_V3_2_AUX_PWR_PLD_EN_R",
- "HP_LVC3_OCP_V3_2_PWRGD_PLD","HP_OCP_V3_2_HSC_PWRGD_PLD_R";
-};
-
-&io_expander13 {
- gpio-line-names =
- "NODEA_NODEB_PWOK_PLD_ISO_R","PWR_EN_NICS",
- "PWRGD_P12V_AUX_FAN_PLD","P12V_AUX_FAN_EN_PLD",
- "PWRGD_P3V3_AUX_PLD","PWRGD_P12V_AUX_PLD_ISO_R",
- "FM_MAIN_PWREN_FROM_RMC_R","FM_MAIN_PWREN_RMC_EN_ISO_R",
- "PWRGD_RMC_R","PWRGD_P12V_AUX_FAN_PLD",
- "P12V_AUX_FAN_EN_PLD","FM_SYS_THROTTLE_N",
"HP_LVC3_OCP_V3_2_PRSNT2_PLD_N","HP_LVC3_OCP_V3_1_PRSNT2_PLD_N",
- "","";
+ "PRSNT_HDDBD_POWER_CABLE_N","PRSNT_OSFP0_POWER_CABLE_N",
+ "PRSNT_CHASSIS3_LEAK_CABLE_R_N","PRSNT_CHASSIS2_LEAK_CABLE_R_N",
+ "PRSNT_CHASSIS1_LEAK_CABLE_R_N","PRSNT_CHASSIS0_LEAK_CABLE_R_N";
};
-&io_expander14 {
- gpio-line-names =
- "","","","","","","","",
- "FM_BOARD_BMC_SKU_ID3","FM_BOARD_BMC_SKU_ID2",
- "FM_BOARD_BMC_SKU_ID1","FM_BOARD_BMC_SKU_ID0",
- "FAB_BMC_REV_ID2","FAB_BMC_REV_ID1",
- "FAB_BMC_REV_ID0","";
-};
--
2.31.1
Powered by blists - more mailing lists