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Message-ID: <173089012493.32228.9669370223751726698.tip-bot2@tip-bot2> Date: Wed, 06 Nov 2024 10:48:44 -0000 From: "tip-bot2 for Jisheng Zhang" <tip-bot2@...utronix.de> To: linux-tip-commits@...r.kernel.org Cc: Jisheng Zhang <jszhang@...nel.org>, Sebastian Andrzej Siewior <bigeasy@...utronix.de>, "Peter Zijlstra (Intel)" <peterz@...radead.org>, Palmer Dabbelt <palmer@...osinc.com>, x86@...nel.org, linux-kernel@...r.kernel.org Subject: [tip: sched/core] riscv: add PREEMPT_LAZY support The following commit has been merged into the sched/core branch of tip: Commit-ID: 22aaec357c1ff85b72c105c90503e3b4187384b8 Gitweb: https://git.kernel.org/tip/22aaec357c1ff85b72c105c90503e3b4187384b8 Author: Jisheng Zhang <jszhang@...nel.org> AuthorDate: Mon, 21 Oct 2024 17:08:42 +02:00 Committer: Peter Zijlstra <peterz@...radead.org> CommitterDate: Tue, 05 Nov 2024 12:55:39 +01:00 riscv: add PREEMPT_LAZY support riscv has switched to GENERIC_ENTRY, so adding PREEMPT_LAZY is as simple as adding TIF_NEED_RESCHED_LAZY related definitions and enabling ARCH_HAS_PREEMPT_LAZY. [bigeasy: Replace old PREEMPT_AUTO bits with new PREEMPT_LAZY ] Signed-off-by: Jisheng Zhang <jszhang@...nel.org> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@...utronix.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org> Acked-by: Palmer Dabbelt <palmer@...osinc.com> Link: https://lkml.kernel.org/r/20241021151257.102296-4-bigeasy@linutronix.de --- arch/riscv/Kconfig | 1 + arch/riscv/include/asm/thread_info.h | 10 ++++++---- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 6254594..3516c58 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -39,6 +39,7 @@ config RISCV select ARCH_HAS_MMIOWB select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE select ARCH_HAS_PMEM_API + select ARCH_HAS_PREEMPT_LAZY select ARCH_HAS_PREPARE_SYNC_CORE_CMD select ARCH_HAS_PTE_DEVMAP if 64BIT && MMU select ARCH_HAS_PTE_SPECIAL diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h index 9c10fb1..f5916a7 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -107,9 +107,10 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src); * - pending work-to-be-done flags are in lowest half-word * - other flags in upper half-word(s) */ -#define TIF_NOTIFY_RESUME 1 /* callback before returning to user */ -#define TIF_SIGPENDING 2 /* signal pending */ -#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ +#define TIF_NEED_RESCHED 0 /* rescheduling necessary */ +#define TIF_NEED_RESCHED_LAZY 1 /* Lazy rescheduling needed */ +#define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ +#define TIF_SIGPENDING 3 /* signal pending */ #define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */ #define TIF_MEMDIE 5 /* is terminating due to OOM killer */ #define TIF_NOTIFY_SIGNAL 9 /* signal notifications exist */ @@ -117,9 +118,10 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src); #define TIF_32BIT 11 /* compat-mode 32bit process */ #define TIF_RISCV_V_DEFER_RESTORE 12 /* restore Vector before returing to user */ +#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) +#define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) -#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) #define _TIF_NOTIFY_SIGNAL (1 << TIF_NOTIFY_SIGNAL) #define _TIF_UPROBE (1 << TIF_UPROBE) #define _TIF_RISCV_V_DEFER_RESTORE (1 << TIF_RISCV_V_DEFER_RESTORE)
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