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Message-ID: <202411080315.8JXzpAnT-lkp@intel.com>
Date: Fri, 8 Nov 2024 04:01:42 +0800
From: kernel test robot <lkp@...el.com>
To: Jonas Rebmann <jre@...gutronix.de>, Mark Brown <broonie@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: oe-kbuild-all@...ts.linux.dev, linux-spi@...r.kernel.org,
imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
Jonas Rebmann <jre@...gutronix.de>
Subject: Re: [PATCH 2/2] spi: imx: support word delay
Hi Jonas,
kernel test robot noticed the following build errors:
[auto build test ERROR on 9852d85ec9d492ebef56dc5f229416c925758edc]
url: https://github.com/intel-lab-lkp/linux/commits/Jonas-Rebmann/spi-imx-pass-struct-spi_transfer-to-prepare_transfer/20241107-233756
base: 9852d85ec9d492ebef56dc5f229416c925758edc
patch link: https://lore.kernel.org/r/20241107-imx-spi-word-delay-v1-2-2a969214d796%40pengutronix.de
patch subject: [PATCH 2/2] spi: imx: support word delay
config: arc-randconfig-002-20241108 (https://download.01.org/0day-ci/archive/20241108/202411080315.8JXzpAnT-lkp@intel.com/config)
compiler: arc-elf-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241108/202411080315.8JXzpAnT-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202411080315.8JXzpAnT-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/spi/spi-imx.c: In function 'mx51_ecspi_prepare_transfer':
>> drivers/spi/spi-imx.c:739:14: error: implicit declaration of function 'FIELD_FIT' [-Werror=implicit-function-declaration]
739 | if (!FIELD_FIT(MX51_ECSPI_PERIOD_MASK, word_delay_sck))
| ^~~~~~~~~
In file included from include/linux/byteorder/little_endian.h:5,
from arch/arc/include/uapi/asm/byteorder.h:16,
from include/asm-generic/bitops/le.h:6,
from arch/arc/include/asm/bitops.h:192,
from include/linux/bitops.h:68,
from include/linux/kernel.h:23,
from include/linux/clk.h:13,
from drivers/spi/spi-imx.c:6:
>> drivers/spi/spi-imx.c:742:16: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
742 | writel(FIELD_PREP(MX51_ECSPI_PERIOD_MASK, word_delay_sck),
| ^~~~~~~~~~
include/uapi/linux/byteorder/little_endian.h:34:51: note: in definition of macro '__cpu_to_le32'
34 | #define __cpu_to_le32(x) ((__force __le32)(__u32)(x))
| ^
arch/arc/include/asm/io.h:208:47: note: in expansion of macro 'writel_relaxed'
208 | #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
| ^~~~~~~~~~~~~~
drivers/spi/spi-imx.c:742:9: note: in expansion of macro 'writel'
742 | writel(FIELD_PREP(MX51_ECSPI_PERIOD_MASK, word_delay_sck),
| ^~~~~~
cc1: some warnings being treated as errors
vim +/FIELD_FIT +739 drivers/spi/spi-imx.c
665
666 static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
667 struct spi_device *spi, struct spi_transfer *t)
668 {
669 u32 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL);
670 u64 word_delay_sck;
671 u32 clk;
672
673 /* Clear BL field and set the right value */
674 ctrl &= ~MX51_ECSPI_CTRL_BL_MASK;
675 if (spi_imx->target_mode && is_imx53_ecspi(spi_imx))
676 ctrl |= (spi_imx->target_burst * 8 - 1)
677 << MX51_ECSPI_CTRL_BL_OFFSET;
678 else {
679 ctrl |= (spi_imx->bits_per_word - 1)
680 << MX51_ECSPI_CTRL_BL_OFFSET;
681 }
682
683 /* set clock speed */
684 ctrl &= ~(0xf << MX51_ECSPI_CTRL_POSTDIV_OFFSET |
685 0xf << MX51_ECSPI_CTRL_PREDIV_OFFSET);
686 ctrl |= mx51_ecspi_clkdiv(spi_imx, spi_imx->spi_bus_clk, &clk);
687 spi_imx->spi_bus_clk = clk;
688
689 mx51_configure_cpha(spi_imx, spi);
690
691 /*
692 * ERR009165: work in XHC mode instead of SMC as PIO on the chips
693 * before i.mx6ul.
694 */
695 if (spi_imx->usedma && spi_imx->devtype_data->tx_glitch_fixed)
696 ctrl |= MX51_ECSPI_CTRL_SMC;
697 else
698 ctrl &= ~MX51_ECSPI_CTRL_SMC;
699
700 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
701
702 /* calculate word delay in SPI Clock (SCLK) cycles */
703 if (t->word_delay.value == 0) {
704 word_delay_sck = 0;
705 } else if (t->word_delay.unit == SPI_DELAY_UNIT_SCK) {
706 word_delay_sck = t->word_delay.value;
707
708 if (word_delay_sck <= MX51_ECSPI_PERIOD_MIN_DELAY_SCK)
709 word_delay_sck = 0;
710 else if (word_delay_sck <= MX51_ECSPI_PERIOD_MIN_DELAY_SCK + 1)
711 word_delay_sck = 1;
712 else
713 word_delay_sck -= MX51_ECSPI_PERIOD_MIN_DELAY_SCK + 1;
714 } else {
715 int word_delay_ns;
716
717 word_delay_ns = spi_delay_to_ns(&t->word_delay, t);
718 if (word_delay_ns < 0)
719 return word_delay_ns;
720
721 if (word_delay_ns <= mul_u64_u32_div(NSEC_PER_SEC,
722 MX51_ECSPI_PERIOD_MIN_DELAY_SCK,
723 spi_imx->spi_bus_clk)) {
724 word_delay_sck = 0;
725 } else if (word_delay_ns <= mul_u64_u32_div(NSEC_PER_SEC,
726 MX51_ECSPI_PERIOD_MIN_DELAY_SCK + 1,
727 spi_imx->spi_bus_clk)) {
728 word_delay_sck = 1;
729 } else {
730 word_delay_ns -= mul_u64_u32_div(NSEC_PER_SEC,
731 MX51_ECSPI_PERIOD_MIN_DELAY_SCK + 1,
732 spi_imx->spi_bus_clk);
733
734 word_delay_sck = DIV_U64_ROUND_UP((u64)word_delay_ns * spi_imx->spi_bus_clk,
735 NSEC_PER_SEC);
736 }
737 }
738
> 739 if (!FIELD_FIT(MX51_ECSPI_PERIOD_MASK, word_delay_sck))
740 return -EINVAL;
741
> 742 writel(FIELD_PREP(MX51_ECSPI_PERIOD_MASK, word_delay_sck),
743 spi_imx->base + MX51_ECSPI_PERIOD);
744
745 return 0;
746 }
747
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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