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Message-ID: <20241107121513.641281-3-quic_yrangana@quicinc.com>
Date: Thu, 7 Nov 2024 17:45:13 +0530
From: Yuvaraj Ranganathan <quic_yrangana@...cinc.com>
To: Herbert Xu <herbert@...dor.apana.org.au>,
        "David S. Miller"
	<davem@...emloft.net>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski
	<krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Bjorn Andersson
	<andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Vinod Koul
	<vkoul@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <linux-crypto@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <quic_yrangana@...cinc.com>, <quic_sravank@...cinc.com>
Subject: [PATCH V2 2/2] arm64: dts: qcom: qcs8300: add TRNG node

The qcs8300 SoC has a True Random Number Generator, add the node with
the correct compatible set.

Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@...cinc.com>
---
 arch/arm64/boot/dts/qcom/qcs8300.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
index 2c35f96c3f28..39c0c6b8516d 100644
--- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
@@ -588,6 +588,11 @@ &clk_virt SLAVE_QUP_CORE_0 0>,
 			};
 		};

+		rng: rng@...2000 {
+			compatible = "qcom,qcs8300-trng", "qcom,trng";
+			reg = <0 0x010d2000 0 0x1000>;
+		};
+
 		config_noc: interconnect@...0000 {
 			compatible = "qcom,qcs8300-config-noc";
 			reg = <0x0 0x014c0000 0x0 0x13080>;
--
2.34.1


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