linux-kernel - Re: [PATCH-next v3] drm/amdgpu: Cleanup shift coding style

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Message-ID: <CAJ7bep+uo5_xF13e_1mYFMf1npWw1cTbcOe+f19avpjEPfyBqQ@mail.gmail.com>
Date: Fri, 8 Nov 2024 20:41:21 +0530
From: Advait Dhamorikar <advaitdhamorikar@...il.com>
To: alexander.deucher@....com, christian.koenig@....com, Xinhui.Pan@....com, 
	airlied@...il.com, simona@...ll.ch, leo.liu@....com, 
	sathishkumar.sundararaju@....com, saleemkhan.jamadar@....com, 
	sonny.jiang@....com
Cc: amd-gfx@...ts.freedesktop.org, dri-devel@...ts.freedesktop.org, 
	linux-kernel@...r.kernel.org, skhan@...uxfoundation.org, 
	anupnewsmail@...il.com
Subject: Re: [PATCH-next v3] drm/amdgpu: Cleanup shift coding style

Hello,

I have addressed the previous comments,
Is there something more that I need to address in this version of the patch?
I would appreciate feedback.

Best regards,
Advait

On Wed, 9 Oct 2024 at 00:46, Advait Dhamorikar
<advaitdhamorikar@...il.com> wrote:
>
> Improves the coding style by updating bit-shift
> operations in the amdgpu_jpeg.c driver file.
> It ensures consistency and avoids potential issues
> by explicitly using 1U and 1ULL for unsigned
> and unsigned long long shifts in all relevant instances.
>
>
> Signed-off-by: Advait Dhamorikar <advaitdhamorikar@...il.com>
> ---
> v1->v2: address review comments
> https://lore.kernel.org/lkml/CAJ7bepJrm9tJJMSZXz0B_94y8817X4oFpwnrTmUHeagOFgVL7g@mail.gmail.com/
> v2->v3: update changelog and add additional 1U cleanups
> https://lore.kernel.org/lkml/CADnq5_OgZvTgUDvDqDikoUh28jTRm2mOAVV6zAEtWE9RHTFkyA@mail.gmail.com/
>
>  drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
> index 95e2796919fc..995bc28b4fe6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
> @@ -47,7 +47,7 @@ int amdgpu_jpeg_sw_init(struct amdgpu_device *adev)
>                 adev->jpeg.indirect_sram = true;
>
>         for (i = 0; i < adev->jpeg.num_jpeg_inst; i++) {
> -               if (adev->jpeg.harvest_config & (1 << i))
> +               if (adev->jpeg.harvest_config & (1U << i))
>                         continue;
>
>                 if (adev->jpeg.indirect_sram) {
> @@ -73,7 +73,7 @@ int amdgpu_jpeg_sw_fini(struct amdgpu_device *adev)
>         int i, j;
>
>         for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
> -               if (adev->jpeg.harvest_config & (1 << i))
> +               if (adev->jpeg.harvest_config & (1U << i))
>                         continue;
>
>                 amdgpu_bo_free_kernel(
> @@ -110,7 +110,7 @@ static void amdgpu_jpeg_idle_work_handler(struct work_struct *work)
>         unsigned int i, j;
>
>         for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
> -               if (adev->jpeg.harvest_config & (1 << i))
> +               if (adev->jpeg.harvest_config & (1U << i))
>                         continue;
>
>                 for (j = 0; j < adev->jpeg.num_jpeg_rings; ++j)
> @@ -357,7 +357,7 @@ static int amdgpu_debugfs_jpeg_sched_mask_set(void *data, u64 val)
>         if (!adev)
>                 return -ENODEV;
>
> -       mask = (1 << (adev->jpeg.num_jpeg_inst * adev->jpeg.num_jpeg_rings)) - 1;
> +       mask = (1ULL << (adev->jpeg.num_jpeg_inst * adev->jpeg.num_jpeg_rings)) - 1;
>         if ((val & mask) == 0)
>                 return -EINVAL;
>
> @@ -388,7 +388,7 @@ static int amdgpu_debugfs_jpeg_sched_mask_get(void *data, u64 *val)
>                 for (j = 0; j < adev->jpeg.num_jpeg_rings; ++j) {
>                         ring = &adev->jpeg.inst[i].ring_dec[j];
>                         if (ring->sched.ready)
> -                               mask |= 1 << ((i * adev->jpeg.num_jpeg_rings) + j);
> +                               mask |= 1ULL << ((i * adev->jpeg.num_jpeg_rings) + j);
>                 }
>         }
>         *val = mask;
> --
> 2.34.1
>