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Message-ID: <20241108174004.GJ539304@nvidia.com>
Date: Fri, 8 Nov 2024 13:40:04 -0400
From: Jason Gunthorpe <jgg@...dia.com>
To: Nicolin Chen <nicolinc@...dia.com>
Cc: kevin.tian@...el.com, corbet@....net, joro@...tes.org,
suravee.suthikulpanit@....com, will@...nel.org,
robin.murphy@....com, dwmw2@...radead.org, shuah@...nel.org,
iommu@...ts.linux.dev, linux-doc@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-kselftest@...r.kernel.org,
baolu.lu@...ux.intel.com, eric.auger@...hat.com,
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shameerali.kolothum.thodi@...wei.com, smostafa@...gle.com,
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patches@...ts.linux.dev
Subject: Re: [PATCH v7 00/13] iommufd: Add vIOMMU infrastructure (Part-1)
On Tue, Nov 05, 2024 at 12:04:16PM -0800, Nicolin Chen wrote:
> This series introduces a new vIOMMU infrastructure and related ioctls.
>
> IOMMUFD has been using the HWPT infrastructure for all cases, including a
> nested IO page table support. Yet, there're limitations for an HWPT-based
> structure to support some advanced HW-accelerated features, such as CMDQV
> on NVIDIA Grace, and HW-accelerated vIOMMU on AMD. Even for a multi-IOMMU
> environment, it is not straightforward for nested HWPTs to share the same
> parent HWPT (stage-2 IO pagetable), with the HWPT infrastructure alone: a
> parent HWPT typically hold one stage-2 IO pagetable and tag it with only
> one ID in the cache entries. When sharing one large stage-2 IO pagetable
> across physical IOMMU instances, that one ID may not always be available
> across all the IOMMU instances. In other word, it's ideal for SW to have
> a different container for the stage-2 IO pagetable so it can hold another
> ID that's available. And this container will be able to hold some advanced
> feature too.
Applied to iommufd for-next, thanks
Jason
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