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Message-ID: <44de3e9-8c55-3740-fda-3e55c3aae97c@os.amperecomputing.com>
Date: Fri, 8 Nov 2024 12:24:59 -0800 (PST)
From: Ilkka Koskinen <ilkka@...amperecomputing.com>
To: Leo Yan <leo.yan@....com>
cc: Ilkka Koskinen <ilkka@...amperecomputing.com>,
John Garry <john.g.garry@...cle.com>, Will Deacon <will@...nel.org>,
James Clark <james.clark@...aro.org>, Mike Leach <mike.leach@...aro.org>,
Leo Yan <leo.yan@...ux.dev>, Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>, Arnaldo Carvalho de Melo <acme@...nel.org>,
Namhyung Kim <namhyung@...nel.org>, Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>, Ian Rogers <irogers@...gle.com>,
Adrian Hunter <adrian.hunter@...el.com>,
"Liang, Kan" <kan.liang@...ux.intel.com>,
Graham Woodward <graham.woodward@....com>,
linux-arm-kernel@...ts.infradead.org, linux-perf-users@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 1/2] perf arm-spe: Prepare for adding data source
packet implementations for other cores
On Fri, 8 Nov 2024, Leo Yan wrote:
> Hi Ilkka,
>
> On Fri, Nov 08, 2024 at 01:09:10AM +0000, Ilkka Koskinen wrote:
>>
>> Split Data Source Packet handling to prepare adding support for
>> other implementations.
>>
>> Signed-off-by: Ilkka Koskinen <ilkka@...amperecomputing.com>
>> ---
>> tools/perf/util/arm-spe.c | 42 ++++++++++++++++++++++++++++-----------
>> 1 file changed, 30 insertions(+), 12 deletions(-)
>>
>> diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c
>> index dbf13f47879c..dfb0c07cb7fe 100644
>> --- a/tools/perf/util/arm-spe.c
>> +++ b/tools/perf/util/arm-spe.c
>> @@ -103,6 +103,18 @@ struct arm_spe_queue {
>> u32 flags;
>> };
>>
>> +struct data_source_handle {
>> + const struct midr_range *midr_ranges;
>> + void (*ds_synth)(const struct arm_spe_record *record,
>> + union perf_mem_data_src *data_src);
>> +};
>> +
>> +#define DS(range, func) \
>> + { \
>> + .midr_ranges = range, \
>> + .ds_synth = arm_spe__synth_##func, \
>> + }
>> +
>> static void arm_spe_dump(struct arm_spe *spe __maybe_unused,
>> unsigned char *buf, size_t len)
>> {
>> @@ -443,6 +455,10 @@ static const struct midr_range common_ds_encoding_cpus[] = {
>> {},
>> };
>>
>> +static const struct data_source_handle data_source_handles[] = {
>> + DS(common_ds_encoding_cpus, data_source_common),
>> +};
>> +
>
> Move this structure under arm_spe__synth_data_source_common(),
> otherwise, the building will fail:
Uh, didn't I build it after I moved the arrays. I fix it right away
--Ilkka
>
> CC util/arm-spe.o
> util/arm-spe.c:115:15: error: ‘arm_spe__synth_data_source_common’ undeclared here (not in a function)
> 115 | .ds_synth = arm_spe__synth_##func, \
> | ^~~~~~~~~~~~~~~
> util/arm-spe.c:464:2: note: in expansion of macro ‘DS’
> 464 | DS(common_ds_encoding_cpus, data_source_common),
> | ^~
>
> The rest looks good to me.
>
> Thanks,
> Leo
>
>> static void arm_spe__sample_flags(struct arm_spe_queue *speq)
>> {
>> const struct arm_spe_record *record = &speq->decoder->record;
>> @@ -555,12 +571,14 @@ static void arm_spe__synth_memory_level(const struct arm_spe_record *record,
>> data_src->mem_lvl |= PERF_MEM_LVL_REM_CCE1;
>> }
>>
>> -static bool arm_spe__is_common_ds_encoding(struct arm_spe_queue *speq)
>> +static bool arm_spe__synth_ds(struct arm_spe_queue *speq,
>> + const struct arm_spe_record *record,
>> + union perf_mem_data_src *data_src)
>> {
>> struct arm_spe *spe = speq->spe;
>> - bool is_in_cpu_list;
>> u64 *metadata = NULL;
>> - u64 midr = 0;
>> + u64 midr;
>> + unsigned int i;
>>
>> /* Metadata version 1 assumes all CPUs are the same (old behavior) */
>> if (spe->metadata_ver == 1) {
>> @@ -592,18 +610,20 @@ static bool arm_spe__is_common_ds_encoding(struct arm_spe_queue *speq)
>> midr = metadata[ARM_SPE_CPU_MIDR];
>> }
>>
>> - is_in_cpu_list = is_midr_in_range_list(midr, common_ds_encoding_cpus);
>> - if (is_in_cpu_list)
>> - return true;
>> - else
>> - return false;
>> + for (i = 0; i < ARRAY_SIZE(data_source_handles); i++) {
>> + if (is_midr_in_range_list(midr, data_source_handles[i].midr_ranges)) {
>> + data_source_handles[i].ds_synth(record, data_src);
>> + return true;
>> + }
>> + }
>> +
>> + return false;
>> }
>>
>> static u64 arm_spe__synth_data_source(struct arm_spe_queue *speq,
>> const struct arm_spe_record *record)
>> {
>> union perf_mem_data_src data_src = { .mem_op = PERF_MEM_OP_NA };
>> - bool is_common = arm_spe__is_common_ds_encoding(speq);
>>
>> if (record->op & ARM_SPE_OP_LD)
>> data_src.mem_op = PERF_MEM_OP_LOAD;
>> @@ -612,9 +632,7 @@ static u64 arm_spe__synth_data_source(struct arm_spe_queue *speq,
>> else
>> return 0;
>>
>> - if (is_common)
>> - arm_spe__synth_data_source_common(record, &data_src);
>> - else
>> + if (!arm_spe__synth_ds(speq, record, &data_src))
>> arm_spe__synth_memory_level(record, &data_src);
>>
>> if (record->type & (ARM_SPE_TLB_ACCESS | ARM_SPE_TLB_MISS)) {
>> --
>> 2.47.0
>>
>>
>
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