linux-kernel - Re: [PATCH for-next] riscv: Fix default misaligned access trap

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Message-ID: <Zy6bw8Fnkxl2Q78K@ghost>
Date: Fri, 8 Nov 2024 15:16:19 -0800
From: Charlie Jenkins <charlie@...osinc.com>
To: Jesse T <mr.bossman075@...il.com>
Cc: Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>,
	Palmer Dabbelt <palmer@...osinc.com>,
	linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH for-next] riscv: Fix default misaligned access trap

On Fri, Nov 08, 2024 at 05:12:04PM -0500, Jesse T wrote:
> On Fri, Nov 8, 2024 at 5:09 PM Jesse T <mr.bossman075@...il.com> wrote:
> >
> > On Thu, Nov 7, 2024 at 5:38 PM Charlie Jenkins <charlie@...osinc.com> wrote:
> > >
> > > Commit d1703dc7bc8e ("RISC-V: Detect unaligned vector accesses
> > > supported") removed the default handlers for handle_misaligned_load()
> > > and handle_misaligned_store(). When the kernel is compiled without
> > > RISCV_SCALAR_MISALIGNED
> > Technically CONFIG_RISCV_MISALIGNED.
> > I apparently changed `+obj-y += traps_misaligned.o` to
> > `+obj-$(CONFIG_RISCV_MISALIGNED) += traps_misaligned.o`
> > in V2 and didn't change that check back oops sorry.
> >
> > > , these handlers are never defined, causing
> > > compilation errors.
> > >
> > > Signed-off-by: Charlie Jenkins <charlie@...osinc.com>
> > Signed-off-by: Jesse Taube <mr.bossman075@...il.com>
> >
> > > Fixes: d1703dc7bc8e ("RISC-V: Detect unaligned vector accesses supported")
> > > ---
> > >  arch/riscv/include/asm/entry-common.h | 12 ++++++++++++
> > >  1 file changed, 12 insertions(+)
> > >
> > > diff --git a/arch/riscv/include/asm/entry-common.h b/arch/riscv/include/asm/entry-common.h
> > > index 7b32d2b08bb6..c2808561df81 100644
> > > --- a/arch/riscv/include/asm/entry-common.h
> > > +++ b/arch/riscv/include/asm/entry-common.h
> > > @@ -25,7 +25,19 @@ static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs,
> > >  void handle_page_fault(struct pt_regs *regs);
> > >  void handle_break(struct pt_regs *regs);
> > >
> > > +#ifdef CONFIG_RISCV_SCALAR_MISALIGNED
> 
> Meant to say to change this to CONFIG_RISCV_MISALIGNED.
> As they are defined when CONFIG_RISCV_SCALAR_MISALIGNED is false
> and CONFIG_RISCV_VECTOE_MISALIGNED is true. they are only not defined when
> CONFIG_RISCV_SCALAR_MISALIGNED is false.

Oh yes, thank you!

- Charlie

> 
> > >  int handle_misaligned_load(struct pt_regs *regs);
> > >  int handle_misaligned_store(struct pt_regs *regs);
> > > +#else
> > > +static inline int handle_misaligned_load(struct pt_regs *regs)
> > > +{
> > > +       return -1;
> > > +}
> > > +
> > > +static inline int handle_misaligned_store(struct pt_regs *regs)
> > > +{
> > > +       return -1;
> > > +}
> > > +#endif
> > >
> > >  #endif /* _ASM_RISCV_ENTRY_COMMON_H */
> > >
> > > ---
> > > base-commit: 74741a050b79d31d8d2eeee12c77736596d0a6b2
> > > change-id: 20241107-fix_handle_misaligned_load-8be86cb0806e
> > > --
> > > - Charlie
> > >