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Message-ID: <20241108115357.691b77b0@donnerap.manchester.arm.com>
Date: Fri, 8 Nov 2024 11:53:57 +0000
From: Andre Przywara <andre.przywara@....com>
To: John Watts <contact@...kia.org>
Cc: Maxime Ripard <mripard@...nel.org>, Chen-Yu Tsai <wens@...e.org>, Jernej
Skrabec <jernej.skrabec@...il.com>, Maarten Lankhorst
<maarten.lankhorst@...ux.intel.com>, Thomas Zimmermann
<tzimmermann@...e.de>, David Airlie <airlied@...il.com>, Daniel Vetter
<daniel@...ll.ch>, Samuel Holland <samuel@...lland.org>,
dri-devel@...ts.freedesktop.org, linux-arm-kernel@...ts.infradead.org,
linux-sunxi@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drm/sun4i: Workaround TCON TOP conflict between DE0 and
DE1
On Fri, 08 Nov 2024 12:40:16 +1100
John Watts <contact@...kia.org> wrote:
Hi John,
thanks for taking care and sending a patch!
> On the D1 and T113 the TCON TOP cannot handle setting both DEs to a
> single output, even if the outputs are disabled. As a workaround assign
> DE1 to TVE0 by default.
Can you say *why* this patch is needed? Is there something broken that
needs fixing? Where does this show and why wasn't this a problem before?
> A full fix for this would include logic that makes sure both DEs never
> share the same output.
To be honest, given the isolation on this patch, I'd rather wait for this
full fledged solution, especially if there is no pressing need (see above).
> Signed-off-by: John Watts <contact@...kia.org>
> ---
> drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
> index a1ca3916f42bcc63b9ac7643e788d962ef360ca8..543311ffb1509face3fbfd069ded10933f254b9d 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
> +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
> @@ -179,7 +179,7 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master,
> * At least on H6, some registers have some bits set by default
> * which may cause issues. Clear them here.
> */
> - writel(0, regs + TCON_TOP_PORT_SEL_REG);
> + writel(0x20, regs + TCON_TOP_PORT_SEL_REG);
Sorry, but that looks weird:
First, please explain the 0x20. Is it bit 5? If yes, what does that bit
mean? The commit message suggests you know that?
And second: the comment above clearly states that those two writes just
*clear* some registers, to have some sane base line. So please adjust this
comment, and copy in some of the rationale from the commit message.
Explaining things in the commit message is good (so thanks for that!), but
having at least some terse technical explanations near the code, in a
comment, is better.
Cheers,
Andre
> writel(0, regs + TCON_TOP_GATE_SRC_REG);
>
> /*
>
> ---
> base-commit: 98f7e32f20d28ec452afb208f9cffc08448a2652
> change-id: 20241108-tcon_fix-f0585ac9bae0
>
> Best regards,
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