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Message-ID: <aba3bcb7-3144-49c7-8acd-added30bbfdd@kernel.org>
Date: Fri, 8 Nov 2024 07:15:25 -0600
From: Dinh Nguyen <dinguyen@...nel.org>
To: Thorsten Blum <thorsten.blum@...ux.dev>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>
Cc: linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [RESEND PATCH] clk: socfpga: arria10: Optimize local variables in
 clk_pll_recalc_rate()



On 10/26/24 10:53, Thorsten Blum wrote:
> Since readl() returns a u32, the local variable reg can also have the
> data type u32. Furthermore, divf and divq are derived from reg and can
> also be a u32.
> 
> Since do_div() casts the divisor to u32 anyway, changing the data type
> of divq to u32 also removes the following Coccinelle/coccicheck warning
> reported by do_div.cocci:
> 
>    WARNING: do_div() does a 64-by-32 division, please consider using div64_ul instead
> 
> Compile-tested only.
> 
> Signed-off-by: Thorsten Blum <thorsten.blum@...ux.dev>
> ---
>   drivers/clk/socfpga/clk-pll-a10.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 

Applied, thanks!

Dinh

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