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Message-ID: <950f4d06-e064-46f3-b8e7-8bfd48b2b16f@linaro.org>
Date: Tue, 12 Nov 2024 14:34:08 +0100
From: Neil Armstrong <neil.armstrong@...aro.org>
To: xianwei.zhao@...ogic.com, Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Kevin Hilman <khilman@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Bartosz Golaszewski <brgl@...ev.pl>
Cc: linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-amlogic@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 5/5] arm64: dts: amlogic: a4: add pinctrl node
On 12/11/2024 11:26, Xianwei Zhao via B4 Relay wrote:
> From: Xianwei Zhao <xianwei.zhao@...ogic.com>
>
> Add pinctrl device to support Amlogic A4.
>
> Signed-off-by: Xianwei Zhao <xianwei.zhao@...ogic.com>
> ---
> arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 36 +++++++++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
> index de10e7aebf21..a176faf7f1ef 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
> @@ -5,6 +5,7 @@
>
> #include "amlogic-a4-common.dtsi"
> #include <dt-bindings/power/amlogic,a4-pwrc.h>
> +#include <dt-bindings/gpio/amlogic-gpio.h>
> / {
> cpus {
> #address-cells = <2>;
> @@ -48,3 +49,38 @@ pwrc: power-controller {
> };
> };
> };
> +
> +&apb {
> + periphs_pinctrl: pinctrl@...0 {
> + compatible = "amlogic,a4-periphs-pinctrl";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges = <0x0 0x0 0x0 0x4000 0x0 0x02e0>;
> +
> + gpio: bank@0 {
> + reg = <0x0 0x0 0x0 0x0050>,
> + <0x0 0xc0 0x0 0x0220>;
> + reg-names = "mux", "gpio";
> + gpio-controller;
> + #gpio-cells = <3>;
> + gpio-ranges = <&periphs_pinctrl 0 0 73>;
> + };
> + };
> +
> + aobus_pinctrl: pinctrl@...00 {
> + compatible = "amlogic,a4-aobus-pinctrl";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges = <0x0 0x0 0x0 0x8e700 0x0 0x0064>;
> +
> + ao_gpio: bank@0 {
> + reg = <0x0 0x00 0x0 0x04>,
> + <0x0 0x04 0x0 0x60>;
> + reg-names = "mux", "gpio";
> + gpio-controller;
> + #gpio-cells = <3>;
> + gpio-ranges = <&aobus_pinctrl 0 0 8>;
> + };
> + };
> +
> +};
>
Reviewed-by: Neil Armstrong <neil.armstrong@...aro.org>
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