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Message-ID: <173142719146.983081.8984976211275970968.robh@kernel.org>
Date: Tue, 12 Nov 2024 09:59:52 -0600
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Chen Wang <unicornxw@...il.com>
Cc: paul.walmsley@...ive.com, inochiama@...look.com, lpieralisi@...nel.org,
	pbrobinson@...il.com, guoren@...nel.org, conor+dt@...nel.org,
	chao.wei@...hgo.com, manivannan.sadhasivam@...aro.org,
	linux-pci@...r.kernel.org, lee@...nel.org,
	u.kleine-koenig@...libre.com, unicorn_wang@...look.com,
	kw@...ux.com, xiaoguang.xing@...hgo.com, bhelgaas@...gle.com,
	krzk+dt@...nel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, aou@...s.berkeley.edu, arnd@...db.de,
	palmer@...belt.com, linux-riscv@...ts.infradead.org,
	fengchun.li@...hgo.com
Subject: Re: [PATCH 3/5] dt-bindings: mfd: syscon: Add sg2042 pcie ctrl
 compatible


On Mon, 11 Nov 2024 14:00:15 +0800, Chen Wang wrote:
> From: Chen Wang <unicorn_wang@...look.com>
> 
> Document SOPHGO SG2042 compatible for PCIe control registers.
> These registers are shared by pcie controller nodes.
> 
> Signed-off-by: Chen Wang <unicorn_wang@...look.com>
> ---
>  Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 

Acked-by: Rob Herring (Arm) <robh@...nel.org>


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