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Message-ID: <ZzPOsrbkmztWZ4U/@Asurada-Nvidia>
Date: Tue, 12 Nov 2024 13:54:58 -0800
From: Nicolin Chen <nicolinc@...dia.com>
To: Robin Murphy <robin.murphy@....com>
CC: <maz@...nel.org>, <tglx@...utronix.de>, <bhelgaas@...gle.com>,
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Subject: Re: [PATCH RFCv1 0/7] vfio: Allow userspace to specify the address
for each MSI vector
On Mon, Nov 11, 2024 at 01:09:20PM +0000, Robin Murphy wrote:
> On 2024-11-09 5:48 am, Nicolin Chen wrote:
> > To solve this problem the VMM should capture the MSI IOVA allocated by the
> > guest kernel and relay it to the GIC driver in the host kernel, to program
> > the correct MSI IOVA. And this requires a new ioctl via VFIO.
>
> Once VFIO has that information from userspace, though, do we really need
> the whole complicated dance to push it right down into the irqchip layer
> just so it can be passed back up again? AFAICS
> vfio_msi_set_vector_signal() via VFIO_DEVICE_SET_IRQS already explicitly
> rewrites MSI-X vectors, so it seems like it should be pretty
> straightforward to override the message address in general at that
> level, without the lower layers having to be aware at all, no?
Didn't see that clearly!! It works with a simple following override:
--------------------------------------------------------------------
@@ -497,6 +497,10 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_core_device *vdev,
struct msi_msg msg;
get_cached_msi_msg(irq, &msg);
+ if (vdev->msi_iovas) {
+ msg.address_lo = lower_32_bits(vdev->msi_iovas[vector]);
+ msg.address_hi = upper_32_bits(vdev->msi_iovas[vector]);
+ }
pci_write_msi_msg(irq, &msg);
}
--------------------------------------------------------------------
With that, I think we only need one VFIO change for this part :)
Thanks!
Nicolin
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