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Message-ID: <sfygtqch7ldrvtfdfumwmejkekv2j2hcoqemu4ne3bvejqdpdd@dons6axfbywx>
Date: Tue, 12 Nov 2024 17:21:22 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: Krishna chaitanya chundru <quic_krichai@...cinc.com>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>, Krzysztof WilczyĆski <kw@...ux.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, cros-qcom-dts-watchers@...omium.org,
Jingoo Han <jingoohan1@...il.com>, Bartosz Golaszewski <brgl@...ev.pl>, quic_vbadigan@...cinc.com,
linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 6/6] PCI: pwrctl: Add power control driver for qps615
On Tue, Nov 12, 2024 at 09:51:42AM -0600, Bjorn Andersson wrote:
> On Tue, Nov 12, 2024 at 08:31:38PM +0530, Krishna chaitanya chundru wrote:
> > QPS615 is the PCIe switch which has one upstream and three downstream
> > ports. To one of the downstream ports ethernet MAC is connected as endpoint
> > device. Other two downstream ports are supposed to connect to external
> > device. One Host can connect to QPS615 by upstream port. QPS615 switch
> > needs to be configured after powering on and before PCIe link was up.
> >
> > The PCIe controller driver already enables link training at the host side
> > even before qps615 driver probe happens, due to this when driver enables
> > power to the switch it participates in the link training and PCIe link
> > may come up before configuring the switch through i2c. To prevent the
> > host from participating in link training, disable link training on the
> > host side to ensure the link does not come up before the switch is
> > configured via I2C.
> >
> > Based up on dt property and type of the port, qps615 is configured
> > through i2c.
>
> Reviewed-by: Bjorn Andersson <andersson@...nel.org>
>
Sorry, while I think this looks okay, this patch still does not compile.
Trying to compile this code with either clang 14 or 17 I still get the
following error:
CC [M] drivers/pci/pwrctl/pci-pwrctl-qps615.o
In file included from drivers/pci/pwrctl/pci-pwrctl-qps615.c:6:
In file included from ./include/linux/delay.h:13:
In file included from ./include/linux/sched.h:13:
In file included from ./arch/arm64/include/asm/processor.h:29:
In file included from ./include/linux/cache.h:6:
In file included from ./arch/arm64/include/asm/cache.h:43:
In file included from ./arch/arm64/include/asm/cputype.h:228:
In file included from ./arch/arm64/include/asm/sysreg.h:1129:
./include/linux/bitfield.h:166:3: error: call to '__bad_mask' declared with 'error' attribute: bad bitfield mask
166 | __bad_mask();
| ^
./include/linux/bitfield.h:166:3: error: call to '__bad_mask' declared with 'error' attribute: bad bitfield mask
2 errors generated.
make[5]: *** [scripts/Makefile.build:229: drivers/pci/pwrctl/pci-pwrctl-qps615.o] Error 1
make[4]: *** [scripts/Makefile.build:478: drivers/pci/pwrctl] Error 2
make[3]: *** [scripts/Makefile.build:478: drivers/pci] Error 2
make[2]: *** [scripts/Makefile.build:478: drivers] Error 2
make[1]: *** [/home/bjorn/sandbox/kernel/sm8150/Makefile:1946: .] Error 2
make: *** [Makefile:224: __sub-make] Error 2
This is caused by the way you invoke u32_replace_bits()
Regards,
Bjorn
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