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Message-ID: <20241112075959.jatez7wwiukymj2t@thinkpad>
Date: Tue, 12 Nov 2024 13:29:59 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Jenishkumar Maheshbhai Patel <jpatel2@...vell.com>
Cc: lpieralisi@...nel.org, thomas.petazzoni@...tlin.com, kw@...ux.com,
robh@...nel.org, bhelgaas@...gle.com, linux-pci@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
salee@...vell.com, dingwei@...vell.com
Subject: Re: [PATCH 1/1] dt-bindings: pci: armada: add system controller and
MAC reset bit
On Mon, Nov 11, 2024 at 10:52:29PM -0800, Jenishkumar Maheshbhai Patel wrote:
> Adding Armada 7K/8K controller bindings optional system-controller
> and mac-reset-bit-mask needed for linkdown procedure.
>
> Signed-off-by: Jenishkumar Maheshbhai Patel <jpatel2@...vell.com>
Please send the patches as a series if they are all related.
- Mani
> ---
> Documentation/devicetree/bindings/pci/pci-armada8k.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/pci-armada8k.txt b/Documentation/devicetree/bindings/pci/pci-armada8k.txt
> index ff25a134befa..a177b971a9a0 100644
> --- a/Documentation/devicetree/bindings/pci/pci-armada8k.txt
> +++ b/Documentation/devicetree/bindings/pci/pci-armada8k.txt
> @@ -24,6 +24,10 @@ Optional properties:
> - phy-names: names of the PHYs corresponding to the number of lanes.
> Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for
> 2 PHYs.
> +- marvell,system-controller: address of system controller needed
> + in order to reset MAC used by link-down handle
> +- marvell,mac-reset-bit-mask: MAC reset bit of system controller
> + needed in order to reset MAC used by link-down handle
>
> Example:
>
> @@ -45,4 +49,6 @@ Example:
> interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> num-lanes = <1>;
> clocks = <&cpm_syscon0 1 13>;
> + marvell,system-controller = <&CP11X_LABEL(syscon0)>;
> + marvell,mac-reset-bit-mask = <CP11X_PCIEx_MAC_RESET_BIT_MASK(1)>;
> };
> --
> 2.25.1
>
--
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