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Message-ID: <1jzfm426h7.fsf@starbuckisacylon.baylibre.com>
Date: Tue, 12 Nov 2024 09:37:08 +0100
From: Jerome Brunet <jbrunet@...libre.com>
To: Chuan Liu via B4 Relay <devnull+chuan.liu.amlogic.com@...nel.org>
Cc: Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Neil Armstrong <neil.armstrong@...aro.org>, Kevin
Hilman <khilman@...libre.com>, Martin Blumenstingl
<martin.blumenstingl@...glemail.com>, chuan.liu@...ogic.com,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-amlogic@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 3/3] clk: meson: Fix glitch occurs when setting up
glitch-free mux
On Mon 11 Nov 2024 at 11:37, Chuan Liu via B4 Relay <devnull+chuan.liu.amlogic.com@...nel.org> wrote:
> From: Chuan Liu <chuan.liu@...ogic.com>
>
> glitch-free mux has two clock channels (channel 0 and channel 1) with
> the same configuration. When the frequency needs to be changed, the two
> channels ping-pong to ensure clock continuity and suppress glitch.
>
> The glitch-free mux configuration with CLK_SET_RATE_GATE enables the mux
> to perform ping-pong switching to suppress glitches.
>
> Fixes: 84af914404db ("clk: meson: a1: add Amlogic A1 Peripherals clock
> controller driver")
> Fixes: 14ebb3154b8f ("clk: meson: axg: add Video Clocks")
> Fixes: f06ac3ed04e8 ("clk: meson: c3: add c3 clock peripherals controller
> driver")
> Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
> Fixes: fac9a55b66c9 ("clk: meson-gxbb: Add MALI clocks")
> Fixes: 57b55c76aaf1 ("clk: meson: S4: add support for Amlogic S4 SoC
> peripheral clock controller")
Same remarks.
> Signed-off-by: Chuan Liu <chuan.liu@...ogic.com>
> ---
> drivers/clk/meson/a1-peripherals.c | 8 ++++----
> drivers/clk/meson/axg.c | 12 ++++++++----
> drivers/clk/meson/c3-peripherals.c | 4 ++--
> drivers/clk/meson/g12a.c | 12 ++++++++----
> drivers/clk/meson/gxbb.c | 12 ++++++++----
> drivers/clk/meson/s4-peripherals.c | 20 ++++++++++----------
> 6 files changed, 40 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/clk/meson/a1-peripherals.c b/drivers/clk/meson/a1-peripherals.c
> index 4b9686916b17..7f515e002adb 100644
> --- a/drivers/clk/meson/a1-peripherals.c
> +++ b/drivers/clk/meson/a1-peripherals.c
> @@ -423,7 +423,7 @@ static struct clk_regmap dspa_a = {
> &dspa_a_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
>
> @@ -471,7 +471,7 @@ static struct clk_regmap dspa_b = {
> &dspa_b_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
>
> @@ -569,7 +569,7 @@ static struct clk_regmap dspb_a = {
> &dspb_a_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
>
> @@ -617,7 +617,7 @@ static struct clk_regmap dspb_b = {
> &dspb_b_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
>
> diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
> index a1217dff40fa..e2d3266f4b45 100644
> --- a/drivers/clk/meson/axg.c
> +++ b/drivers/clk/meson/axg.c
> @@ -1077,7 +1077,8 @@ static struct clk_regmap axg_vpu_0 = {
> * We want to avoid CCF to disable the VPU clock if
> * display has been set by Bootloader
> */
> - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
> + .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
> + CLK_SET_RATE_GATE,
> },
> };
>
> @@ -1126,7 +1127,8 @@ static struct clk_regmap axg_vpu_1 = {
> * We want to avoid CCF to disable the VPU clock if
> * display has been set by Bootloader
> */
> - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
> + .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
> + CLK_SET_RATE_GATE,
> },
> };
>
> @@ -1194,7 +1196,8 @@ static struct clk_regmap axg_vapb_0 = {
> &axg_vapb_0_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
> + .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
> + CLK_SET_RATE_GATE,
> },
> };
>
> @@ -1242,7 +1245,8 @@ static struct clk_regmap axg_vapb_1 = {
> &axg_vapb_1_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
> + .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
> + CLK_SET_RATE_GATE,
> },
> };
>
> diff --git a/drivers/clk/meson/c3-peripherals.c b/drivers/clk/meson/c3-peripherals.c
> index 4566c2aeeb19..27343a73a521 100644
> --- a/drivers/clk/meson/c3-peripherals.c
> +++ b/drivers/clk/meson/c3-peripherals.c
> @@ -1364,7 +1364,7 @@ static struct clk_regmap hcodec_0 = {
> &hcodec_0_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
>
> @@ -1411,7 +1411,7 @@ static struct clk_regmap hcodec_1 = {
> &hcodec_1_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
>
> diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
> index 4d3b064d09fc..21a25001e904 100644
> --- a/drivers/clk/meson/g12a.c
> +++ b/drivers/clk/meson/g12a.c
> @@ -2746,7 +2746,8 @@ static struct clk_regmap g12a_vpu_0 = {
> .ops = &clk_regmap_gate_ops,
> .parent_hws = (const struct clk_hw *[]) { &g12a_vpu_0_div.hw },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
> + .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
> + CLK_SET_RATE_GATE,
> },
> };
>
> @@ -2790,7 +2791,8 @@ static struct clk_regmap g12a_vpu_1 = {
> .ops = &clk_regmap_gate_ops,
> .parent_hws = (const struct clk_hw *[]) { &g12a_vpu_1_div.hw },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
> + .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
> + CLK_SET_RATE_GATE,
> },
> };
>
> @@ -3035,7 +3037,8 @@ static struct clk_regmap g12a_vapb_0 = {
> &g12a_vapb_0_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
> + .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
> + CLK_SET_RATE_GATE,
> },
> };
>
> @@ -3083,7 +3086,8 @@ static struct clk_regmap g12a_vapb_1 = {
> &g12a_vapb_1_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
> + .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
> + CLK_SET_RATE_GATE,
> },
> };
>
> diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
> index dfa9ffc61b41..812b3e20c366 100644
> --- a/drivers/clk/meson/gxbb.c
> +++ b/drivers/clk/meson/gxbb.c
> @@ -1543,7 +1543,8 @@ static struct clk_regmap gxbb_vpu_0 = {
> .ops = &clk_regmap_gate_ops,
> .parent_hws = (const struct clk_hw *[]) { &gxbb_vpu_0_div.hw },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
> + .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
> + CLK_SET_RATE_GATE,
> },
> };
>
> @@ -1591,7 +1592,8 @@ static struct clk_regmap gxbb_vpu_1 = {
> .ops = &clk_regmap_gate_ops,
> .parent_hws = (const struct clk_hw *[]) { &gxbb_vpu_1_div.hw },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
> + .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
> + CLK_SET_RATE_GATE,
> },
> };
>
> @@ -1674,7 +1676,8 @@ static struct clk_regmap gxbb_vapb_0 = {
> &gxbb_vapb_0_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
> + .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
> + CLK_SET_RATE_GATE,
> },
> };
>
> @@ -1726,7 +1729,8 @@ static struct clk_regmap gxbb_vapb_1 = {
> &gxbb_vapb_1_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
> + .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
> + CLK_SET_RATE_GATE,
> },
> };
>
> diff --git a/drivers/clk/meson/s4-peripherals.c b/drivers/clk/meson/s4-peripherals.c
> index 79e0240d58e6..cf10be40141d 100644
> --- a/drivers/clk/meson/s4-peripherals.c
> +++ b/drivers/clk/meson/s4-peripherals.c
> @@ -1466,7 +1466,7 @@ static struct clk_regmap s4_vdec_p0 = {
> &s4_vdec_p0_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
>
> @@ -1516,7 +1516,7 @@ static struct clk_regmap s4_vdec_p1 = {
> &s4_vdec_p1_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
>
> @@ -1586,7 +1586,7 @@ static struct clk_regmap s4_hevcf_p0 = {
> &s4_hevcf_p0_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
>
> @@ -1636,7 +1636,7 @@ static struct clk_regmap s4_hevcf_p1 = {
> &s4_hevcf_p1_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
>
> @@ -1712,7 +1712,7 @@ static struct clk_regmap s4_vpu_0 = {
> .ops = &clk_regmap_gate_ops,
> .parent_hws = (const struct clk_hw *[]) { &s4_vpu_0_div.hw },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
>
> @@ -1756,7 +1756,7 @@ static struct clk_regmap s4_vpu_1 = {
> .ops = &clk_regmap_gate_ops,
> .parent_hws = (const struct clk_hw *[]) { &s4_vpu_1_div.hw },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
>
> @@ -1921,7 +1921,7 @@ static struct clk_regmap s4_vpu_clkc_p0 = {
> &s4_vpu_clkc_p0_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
>
> @@ -1969,7 +1969,7 @@ static struct clk_regmap s4_vpu_clkc_p1 = {
> &s4_vpu_clkc_p1_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
>
> @@ -2049,7 +2049,7 @@ static struct clk_regmap s4_vapb_0 = {
> &s4_vapb_0_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
>
> @@ -2097,7 +2097,7 @@ static struct clk_regmap s4_vapb_1 = {
> &s4_vapb_1_div.hw
> },
> .num_parents = 1,
> - .flags = CLK_SET_RATE_PARENT,
> + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
> },
> };
--
Jerome
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