linux-kernel - Re: [PATCH v2 2/2] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAMuHMdX4nMA6HSu=UkNEWJWKK432VB5YVQCWn_rDZ6mNSv+41g@mail.gmail.com>
Date: Tue, 12 Nov 2024 11:50:29 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Clément Léger <clement.leger@...tlin.com>
Cc: Magnus Damm <magnus.damm@...il.com>, Rob Herring <robh+dt@...nel.org>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, 
	Thomas Petazzoni <thomas.petazzoni@...tlin.com>, Herve Codina <herve.codina@...tlin.com>, 
	Miquèl Raynal <miquel.raynal@...tlin.com>, 
	Milan Stevanovic <milan.stevanovic@...com>, Jimmy Lalande <jimmy.lalande@...com>, 
	Pascal Eberhard <pascal.eberhard@...com>, linux-renesas-soc@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	Gareth Williams <gareth.williams.jx@...esas.com>, 
	Wolfram Sang <wsa+renesas@...g-engineering.com>
Subject: Re: [PATCH v2 2/2] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb
 board device-tree

Hi Clément,

On Wed, Feb 15, 2023 at 12:31 PM Geert Uytterhoeven
<geert@...ux-m68k.org> wrote:
> On Wed, Feb 15, 2023 at 11:52 AM Clément Léger
> <clement.leger@...tlin.com> wrote:
> > Le Wed, 15 Feb 2023 09:29:33 +0100,
> > Clément Léger <clement.leger@...tlin.com> a écrit :
> > > Le Tue, 14 Feb 2023 17:25:14 +0100,
> > > Geert Uytterhoeven <geert@...ux-m68k.org> a écrit :
> > > > On Thu, Feb 9, 2023 at 2:32 PM Clément Léger <clement.leger@...tlin.com> wrote:
> > > > > The EB board (Expansion board) supports both RZ/N1D and RZ-N1S. Since this
> > > > > configuration targets only the RZ/N1D, it is named r9a06g032-rzn1d400-eb.
> > > > > It adds support for the 2 additional switch ports (port C and D) that are
> > > > > available on that board.
> > > > >
> > > > > Signed-off-by: Clément Léger <clement.leger@...tlin.com>
> > > >
> > > > Thanks for your patch!
> > > >
> > > > > --- /dev/null
> > > > > +++ b/arch/arm/boot/dts/r9a06g032-rzn1d400-eb.dts
>
> > > > > +       pinctrl-0 = <&pins_eth1>, <&pins_eth2>, <&pins_eth3>, <&pins_eth4>,
> > > > > +                   <&pins_mdio1>;
> > > > > +
> > > > > +       mdio {
> > > > > +               /* CN15 and CN16 switches must be configured in MDIO2 mode */
> > > > > +               switch0phy1: ethernet-phy@1 {
> > > > > +                       reg = <1>;
> > > > > +                       marvell,reg-init = <3 16 0 0x1010>;
> > > >
> > > > marvell,reg-init is not documented in any DT bindings document?
> > >
> > > Indeed, this is not somethiong that should be made available here. It's
> > > only inverting the LED polarity but supported by some internal patch.
> > > I'll remove that.
>
> > I actually was confused by a property I added in another device-tree but
> > marvell,reg-init exists, is handled by the marvell phy driver and used
> > in a few device-trees. Strangely, it is not documented anywhere. So I
> > can either remove that (and the LED won't work properly) or let it live
> > depending on what you prefer.
>
> In that case, please keep it.
> But the property really should be documented, one day...

Any plans to follow-up?
Thanks!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds