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Message-ID: <20241112-sa8775p_cpuidle-v1-1-66ff3ba72464@quicinc.com>
Date: Tue, 12 Nov 2024 16:31:51 +0530
From: Maulik Shah <quic_mkshah@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio
<konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski
<krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Bartosz Golaszewski
<bartosz.golaszewski@...aro.org>
CC: <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <quic_lsrao@...cinc.com>,
Maulik Shah
<quic_mkshah@...cinc.com>
Subject: [PATCH] arm64: dts: qcom: sa8775p: Add CPUs to psci power domain
Commit 4f79d0deae37 ("arm64: dts: qcom: sa8775p: add CPU idle states")
already added cpu and cluster idle-states but have not added CPU devices
to psci power domain without which idle states do not get detected.
Add CPUs to psci power domain.
Fixes: 4f79d0deae37 ("arm64: dts: qcom: sa8775p: add CPU idle states")
Signed-off-by: Maulik Shah <quic_mkshah@...cinc.com>
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 9f315a51a7c1..26290feb768f 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -44,6 +44,8 @@
compatible = "qcom,kryo";
reg = <0x0 0x0>;
enable-method = "psci";
+ power-domains = <&cpu_pd0>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
next-level-cache = <&l2_0>;
capacity-dmips-mhz = <1024>;
@@ -66,6 +68,8 @@
compatible = "qcom,kryo";
reg = <0x0 0x100>;
enable-method = "psci";
+ power-domains = <&cpu_pd1>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
next-level-cache = <&l2_1>;
capacity-dmips-mhz = <1024>;
@@ -83,6 +87,8 @@
compatible = "qcom,kryo";
reg = <0x0 0x200>;
enable-method = "psci";
+ power-domains = <&cpu_pd2>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
next-level-cache = <&l2_2>;
capacity-dmips-mhz = <1024>;
@@ -100,6 +106,8 @@
compatible = "qcom,kryo";
reg = <0x0 0x300>;
enable-method = "psci";
+ power-domains = <&cpu_pd3>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
next-level-cache = <&l2_3>;
capacity-dmips-mhz = <1024>;
@@ -117,6 +125,8 @@
compatible = "qcom,kryo";
reg = <0x0 0x10000>;
enable-method = "psci";
+ power-domains = <&cpu_pd4>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
next-level-cache = <&l2_4>;
capacity-dmips-mhz = <1024>;
@@ -140,6 +150,8 @@
compatible = "qcom,kryo";
reg = <0x0 0x10100>;
enable-method = "psci";
+ power-domains = <&cpu_pd5>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
next-level-cache = <&l2_5>;
capacity-dmips-mhz = <1024>;
@@ -157,6 +169,8 @@
compatible = "qcom,kryo";
reg = <0x0 0x10200>;
enable-method = "psci";
+ power-domains = <&cpu_pd6>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
next-level-cache = <&l2_6>;
capacity-dmips-mhz = <1024>;
@@ -174,6 +188,8 @@
compatible = "qcom,kryo";
reg = <0x0 0x10300>;
enable-method = "psci";
+ power-domains = <&cpu_pd7>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
next-level-cache = <&l2_7>;
capacity-dmips-mhz = <1024>;
---
base-commit: 6d59cab07b8d74d0f0422b750038123334f6ecc2
change-id: 20241112-sa8775p_cpuidle-5f3bf2a97219
Best regards,
--
Maulik Shah <quic_mkshah@...cinc.com>
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