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Message-ID: <20241113154013.961113-3-hca@linux.ibm.com>
Date: Wed, 13 Nov 2024 16:40:13 +0100
From: Heiko Carstens <hca@...ux.ibm.com>
To: Nathan Chancellor <nathan@...nel.org>,
Nick Desaulniers <ndesaulniers@...gle.com>,
Vasily Gorbik <gor@...ux.ibm.com>,
Alexander Gordeev <agordeev@...ux.ibm.com>
Cc: linux-kernel@...r.kernel.org, linux-s390@...r.kernel.org,
Sven Schnelle <svens@...ux.ibm.com>,
Christian Borntraeger <borntraeger@...ux.ibm.com>
Subject: [PATCH 2/2] s390/fpu: Remove inline assembly variants for old clang versions
With the minimal clang version raised to 19.1.0 there is no need to keep
the inline assemblies for old clang versions which do not support the O
and R inline assembly format flags.
Support for those flags was added with llvm-project commit 9c75a981554d
("[SystemZ] Implement A, O and R inline assembly format flags (#80685)").
Signed-off-by: Heiko Carstens <hca@...ux.ibm.com>
---
arch/s390/include/asm/fpu-insn.h | 124 -------------------------------
1 file changed, 124 deletions(-)
diff --git a/arch/s390/include/asm/fpu-insn.h b/arch/s390/include/asm/fpu-insn.h
index c1e2e521d9af..e57d80981f13 100644
--- a/arch/s390/include/asm/fpu-insn.h
+++ b/arch/s390/include/asm/fpu-insn.h
@@ -183,22 +183,6 @@ static __always_inline void fpu_vgfmg(u8 v1, u8 v2, u8 v3)
: "memory");
}
-#ifdef CONFIG_CC_IS_CLANG
-
-static __always_inline void fpu_vl(u8 v1, const void *vxr)
-{
- instrument_read(vxr, sizeof(__vector128));
- asm volatile("\n"
- " la 1,%[vxr]\n"
- " VL %[v1],0,,1\n"
- :
- : [vxr] "R" (*(__vector128 *)vxr),
- [v1] "I" (v1)
- : "memory", "1");
-}
-
-#else /* CONFIG_CC_IS_CLANG */
-
static __always_inline void fpu_vl(u8 v1, const void *vxr)
{
instrument_read(vxr, sizeof(__vector128));
@@ -209,8 +193,6 @@ static __always_inline void fpu_vl(u8 v1, const void *vxr)
: "memory");
}
-#endif /* CONFIG_CC_IS_CLANG */
-
static __always_inline void fpu_vleib(u8 v, s16 val, u8 index)
{
asm volatile("VLEIB %[v],%[val],%[index]"
@@ -238,26 +220,6 @@ static __always_inline u64 fpu_vlgvf(u8 v, u16 index)
return val;
}
-#ifdef CONFIG_CC_IS_CLANG
-
-static __always_inline void fpu_vll(u8 v1, u32 index, const void *vxr)
-{
- unsigned int size;
-
- size = min(index + 1, sizeof(__vector128));
- instrument_read(vxr, size);
- asm volatile("\n"
- " la 1,%[vxr]\n"
- " VLL %[v1],%[index],0,1\n"
- :
- : [vxr] "R" (*(u8 *)vxr),
- [index] "d" (index),
- [v1] "I" (v1)
- : "memory", "1");
-}
-
-#else /* CONFIG_CC_IS_CLANG */
-
static __always_inline void fpu_vll(u8 v1, u32 index, const void *vxr)
{
unsigned int size;
@@ -272,30 +234,6 @@ static __always_inline void fpu_vll(u8 v1, u32 index, const void *vxr)
: "memory");
}
-#endif /* CONFIG_CC_IS_CLANG */
-
-#ifdef CONFIG_CC_IS_CLANG
-
-#define fpu_vlm(_v1, _v3, _vxrs) \
-({ \
- unsigned int size = ((_v3) - (_v1) + 1) * sizeof(__vector128); \
- struct { \
- __vector128 _v[(_v3) - (_v1) + 1]; \
- } *_v = (void *)(_vxrs); \
- \
- instrument_read(_v, size); \
- asm volatile("\n" \
- " la 1,%[vxrs]\n" \
- " VLM %[v1],%[v3],0,1\n" \
- : \
- : [vxrs] "R" (*_v), \
- [v1] "I" (_v1), [v3] "I" (_v3) \
- : "memory", "1"); \
- (_v3) - (_v1) + 1; \
-})
-
-#else /* CONFIG_CC_IS_CLANG */
-
#define fpu_vlm(_v1, _v3, _vxrs) \
({ \
unsigned int size = ((_v3) - (_v1) + 1) * sizeof(__vector128); \
@@ -312,8 +250,6 @@ static __always_inline void fpu_vll(u8 v1, u32 index, const void *vxr)
(_v3) - (_v1) + 1; \
})
-#endif /* CONFIG_CC_IS_CLANG */
-
static __always_inline void fpu_vlr(u8 v1, u8 v2)
{
asm volatile("VLR %[v1],%[v2]"
@@ -362,21 +298,6 @@ static __always_inline void fpu_vsrlb(u8 v1, u8 v2, u8 v3)
: "memory");
}
-#ifdef CONFIG_CC_IS_CLANG
-
-static __always_inline void fpu_vst(u8 v1, const void *vxr)
-{
- instrument_write(vxr, sizeof(__vector128));
- asm volatile("\n"
- " la 1,%[vxr]\n"
- " VST %[v1],0,,1\n"
- : [vxr] "=R" (*(__vector128 *)vxr)
- : [v1] "I" (v1)
- : "memory", "1");
-}
-
-#else /* CONFIG_CC_IS_CLANG */
-
static __always_inline void fpu_vst(u8 v1, const void *vxr)
{
instrument_write(vxr, sizeof(__vector128));
@@ -386,26 +307,6 @@ static __always_inline void fpu_vst(u8 v1, const void *vxr)
: "memory");
}
-#endif /* CONFIG_CC_IS_CLANG */
-
-#ifdef CONFIG_CC_IS_CLANG
-
-static __always_inline void fpu_vstl(u8 v1, u32 index, const void *vxr)
-{
- unsigned int size;
-
- size = min(index + 1, sizeof(__vector128));
- instrument_write(vxr, size);
- asm volatile("\n"
- " la 1,%[vxr]\n"
- " VSTL %[v1],%[index],0,1\n"
- : [vxr] "=R" (*(u8 *)vxr)
- : [index] "d" (index), [v1] "I" (v1)
- : "memory", "1");
-}
-
-#else /* CONFIG_CC_IS_CLANG */
-
static __always_inline void fpu_vstl(u8 v1, u32 index, const void *vxr)
{
unsigned int size;
@@ -418,29 +319,6 @@ static __always_inline void fpu_vstl(u8 v1, u32 index, const void *vxr)
: "memory");
}
-#endif /* CONFIG_CC_IS_CLANG */
-
-#ifdef CONFIG_CC_IS_CLANG
-
-#define fpu_vstm(_v1, _v3, _vxrs) \
-({ \
- unsigned int size = ((_v3) - (_v1) + 1) * sizeof(__vector128); \
- struct { \
- __vector128 _v[(_v3) - (_v1) + 1]; \
- } *_v = (void *)(_vxrs); \
- \
- instrument_write(_v, size); \
- asm volatile("\n" \
- " la 1,%[vxrs]\n" \
- " VSTM %[v1],%[v3],0,1\n" \
- : [vxrs] "=R" (*_v) \
- : [v1] "I" (_v1), [v3] "I" (_v3) \
- : "memory", "1"); \
- (_v3) - (_v1) + 1; \
-})
-
-#else /* CONFIG_CC_IS_CLANG */
-
#define fpu_vstm(_v1, _v3, _vxrs) \
({ \
unsigned int size = ((_v3) - (_v1) + 1) * sizeof(__vector128); \
@@ -456,8 +334,6 @@ static __always_inline void fpu_vstl(u8 v1, u32 index, const void *vxr)
(_v3) - (_v1) + 1; \
})
-#endif /* CONFIG_CC_IS_CLANG */
-
static __always_inline void fpu_vupllf(u8 v1, u8 v2)
{
asm volatile("VUPLLF %[v1],%[v2]"
--
2.45.2
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