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Message-ID: <cf394d47-8708-4d88-a773-7af64e500e1c@linaro.org>
Date: Wed, 13 Nov 2024 06:47:20 +0200
From: Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>
To: Barnabás Czémán <barnabas.czeman@...nlining.org>,
Robert Foss <rfoss@...nel.org>, Todor Tomov <todor.too@...il.com>,
Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>
Cc: linux-media@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v4 2/3] media: dt-bindings: Add qcom,msm8953-camss
On 11/3/24 11:45, Barnabás Czémán wrote:
> Add bindings for qcom,msm8953-camss in order to support the camera
> subsystem for MSM8953.
>
> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
> Signed-off-by: Barnabás Czémán <barnabas.czeman@...nlining.org>
> ---
> .../bindings/media/qcom,msm8953-camss.yaml | 322 +++++++++++++++++++++
> 1 file changed, 322 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..8856fba385b1123d748199b46c5009c97700ad9b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml
> @@ -0,0 +1,322 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/qcom,msm8953-camss.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm MSM8953 Camera Subsystem (CAMSS)
> +
> +maintainers:
> + - Barnabas Czeman <barnabas.czeman@...nlining.org>
> +
> +description:
> + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
> +
> +properties:
> + compatible:
> + const: qcom,msm8953-camss
> +
> + clocks:
> + minItems: 30
> + maxItems: 30
> +
> + clock-names:
> + items:
> + - const: ahb
> + - const: csi0
> + - const: csi0_ahb
> + - const: csi0_phy
> + - const: csi0_pix
> + - const: csi0_rdi
> + - const: csi1
> + - const: csi1_ahb
> + - const: csi1_phy
> + - const: csi1_pix
> + - const: csi1_rdi
> + - const: csi2
> + - const: csi2_ahb
> + - const: csi2_phy
> + - const: csi2_pix
> + - const: csi2_rdi
> + - const: csi_vfe0
> + - const: csi_vfe1
> + - const: csiphy0_timer
> + - const: csiphy1_timer
> + - const: csiphy2_timer
> + - const: ispif_ahb
> + - const: micro_ahb
> + - const: top_ahb
> + - const: vfe0
> + - const: vfe0_ahb
> + - const: vfe0_axi
> + - const: vfe1
> + - const: vfe1_ahb
> + - const: vfe1_axi
> +
> + interrupts:
> + minItems: 9
> + maxItems: 9
> +
> + interrupt-names:
> + items:
> + - const: csid0
> + - const: csid1
> + - const: csid2
> + - const: csiphy0
> + - const: csiphy1
> + - const: csiphy2
> + - const: ispif
> + - const: vfe0
> + - const: vfe1
> +
> + iommus:
> + maxItems: 1
> +
> + power-domains:
> + items:
> + - description: VFE0 GDSC - Video Front End, Global Distributed Switch Controller.
> + - description: VFE1 GDSC - Video Front End, Global Distributed Switch Controller.
> +
> + power-domain-names:
> + items:
> + - const: vfe0
> + - const: vfe1
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + description:
> + CSI input ports.
> +
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description:
> + Input port for receiving CSI data.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + data-lanes:
> + description:
> + An array of physical data lanes indexes.
> + Position of an entry determines the logical
> + lane number, while the value of an entry
> + indicates physical lane index. Lane swapping
> + is supported. Physical lane indexes;
> + 0, 2, 3, 4.
Drop the rewritten description, it's given in the referenced above
video-interfaces.yaml
And that 0, 2, 3, 4 array is invalid apparently. Lane 4 is the clock lane.
> + minItems: 1
> + maxItems: 4
> +
> + required:
> + - data-lanes
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description:
> + Input port for receiving CSI data.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> + required:
> + - data-lanes
> +
> + port@2:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description:
> + Input port for receiving CSI data.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> + required:
> + - data-lanes
> +
> + reg:
> + minItems: 13
> + maxItems: 13
> +
> + reg-names:
> + items:
> + - const: csi_clk_mux
> + - const: csid0
> + - const: csid1
> + - const: csid2
> + - const: csiphy0
> + - const: csiphy0_clk_mux
> + - const: csiphy1
> + - const: csiphy1_clk_mux
> + - const: csiphy2
> + - const: csiphy2_clk_mux
> + - const: ispif
> + - const: vfe0
> + - const: vfe1
> +
> + vdda-supply:
> + description:
> + Definition of the regulator used as analog power supply.
Is there such a thing as "analog power supply" in general, and
in connection to CAMSS PHY in particular?
I believe it was just wrongly copied from somewhere. Instead please
explicitly specify that it's a CAMSS CSIPHY supply and provide its
expected voltage level in the description.
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - clocks
> + - clock-names
> + - interrupts
> + - interrupt-names
> + - iommus
> + - power-domains
> + - power-domain-names
> + - vdda-supply
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/clock/qcom,gcc-msm8953.h>
> +
> + camss: camss@...0020 {
> + compatible = "qcom,msm8953-camss";
> +
> + reg = <0x1b00020 0x10>,
> + <0x1b30000 0x100>,
> + <0x1b30400 0x100>,
> + <0x1b30800 0x100>,
> + <0x1b34000 0x1000>,
> + <0x1b00030 0x4>,
> + <0x1b35000 0x1000>,
> + <0x1b00038 0x4>,
> + <0x1b36000 0x1000>,
> + <0x1b00040 0x4>,
> + <0x1b31000 0x500>,
> + <0x1b10000 0x1000>,
> + <0x1b14000 0x1000>;
> + reg-names = "csi_clk_mux",
> + "csid0",
> + "csid1",
> + "csid2",
> + "csiphy0",
> + "csiphy0_clk_mux",
> + "csiphy1",
> + "csiphy1_clk_mux",
> + "csiphy2",
> + "csiphy2_clk_mux",
> + "ispif",
> + "vfe0",
> + "vfe1";
> +
> + clocks = <&gcc GCC_CAMSS_AHB_CLK>,
> + <&gcc GCC_CAMSS_CSI0_CLK>,
> + <&gcc GCC_CAMSS_CSI0_AHB_CLK>,
> + <&gcc GCC_CAMSS_CSI0PHY_CLK>,
> + <&gcc GCC_CAMSS_CSI0PIX_CLK>,
> + <&gcc GCC_CAMSS_CSI0RDI_CLK>,
> + <&gcc GCC_CAMSS_CSI1_CLK>,
> + <&gcc GCC_CAMSS_CSI1_AHB_CLK>,
> + <&gcc GCC_CAMSS_CSI1PHY_CLK>,
> + <&gcc GCC_CAMSS_CSI1PIX_CLK>,
> + <&gcc GCC_CAMSS_CSI1RDI_CLK>,
> + <&gcc GCC_CAMSS_CSI2_CLK>,
> + <&gcc GCC_CAMSS_CSI2_AHB_CLK>,
> + <&gcc GCC_CAMSS_CSI2PHY_CLK>,
> + <&gcc GCC_CAMSS_CSI2PIX_CLK>,
> + <&gcc GCC_CAMSS_CSI2RDI_CLK>,
> + <&gcc GCC_CAMSS_CSI_VFE0_CLK>,
> + <&gcc GCC_CAMSS_CSI_VFE1_CLK>,
> + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
> + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
> + <&gcc GCC_CAMSS_CSI2PHYTIMER_CLK>,
> + <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
> + <&gcc GCC_CAMSS_MICRO_AHB_CLK>,
> + <&gcc GCC_CAMSS_TOP_AHB_CLK>,
> + <&gcc GCC_CAMSS_VFE0_CLK>,
> + <&gcc GCC_CAMSS_VFE0_AHB_CLK>,
> + <&gcc GCC_CAMSS_VFE0_AXI_CLK>,
> + <&gcc GCC_CAMSS_VFE1_CLK>,
> + <&gcc GCC_CAMSS_VFE1_AHB_CLK>,
> + <&gcc GCC_CAMSS_VFE1_AXI_CLK>;
> + clock-names = "ahb",
> + "csi0",
> + "csi0_ahb",
> + "csi0_phy",
> + "csi0_pix",
> + "csi0_rdi",
> + "csi1",
> + "csi1_ahb",
> + "csi1_phy",
> + "csi1_pix",
> + "csi1_rdi",
> + "csi2",
> + "csi2_ahb",
> + "csi2_phy",
> + "csi2_pix",
> + "csi2_rdi",
> + "csi_vfe0",
> + "csi_vfe1",
> + "csiphy0_timer",
> + "csiphy1_timer",
> + "csiphy2_timer",
> + "ispif_ahb",
> + "micro_ahb",
> + "top_ahb",
> + "vfe0",
> + "vfe0_ahb",
> + "vfe0_axi",
> + "vfe1",
> + "vfe1_ahb",
> + "vfe1_axi";
> +
> + interrupts = <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "csid0",
> + "csid1",
> + "csid2",
> + "csiphy0",
> + "csiphy1",
> + "csiphy2",
> + "ispif",
> + "vfe0",
> + "vfe1";
> +
> + iommus = <&apps_iommu 0x14>;
> +
> + power-domains = <&gcc VFE0_GDSC>,
> + <&gcc VFE1_GDSC>;
> + power-domain-names = "vfe0", "vfe1";
> +
> + vdda-supply = <®_2v8>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
>
--
Best wishes,
Vladimir
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