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Message-Id: <20241113051857.12732-2-a0987203069@gmail.com>
Date: Wed, 13 Nov 2024 13:18:55 +0800
From: Joey Lu <a0987203069@...il.com>
To: andrew+netdev@...n.ch,
davem@...emloft.net,
edumazet@...gle.com,
kuba@...nel.org,
pabeni@...hat.com,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
mcoquelin.stm32@...il.com,
richardcochran@...il.com
Cc: alexandre.torgue@...s.st.com,
joabreu@...opsys.com,
ychuang3@...oton.com,
schung@...oton.com,
yclu4@...oton.com,
linux-arm-kernel@...ts.infradead.org,
netdev@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
openbmc@...ts.ozlabs.org,
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Joey Lu <a0987203069@...il.com>
Subject: [PATCH v2 1/3] dt-bindings: net: nuvoton: Add schema for MA35 family GMAC
Create initial schema for Nuvoton MA35 family Gigabit MAC.
Signed-off-by: Joey Lu <a0987203069@...il.com>
---
.../bindings/net/nuvoton,ma35d1-dwmac.yaml | 170 ++++++++++++++++++
1 file changed, 170 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/nuvoton,ma35d1-dwmac.yaml
diff --git a/Documentation/devicetree/bindings/net/nuvoton,ma35d1-dwmac.yaml b/Documentation/devicetree/bindings/net/nuvoton,ma35d1-dwmac.yaml
new file mode 100644
index 000000000000..45eaf13467b3
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/nuvoton,ma35d1-dwmac.yaml
@@ -0,0 +1,170 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/nuvoton,ma35d1-dwmac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton DWMAC glue layer controller
+
+maintainers:
+ - Joey Lu <yclu4@...oton.com>
+
+description:
+ Nuvoton 10/100/1000Mbps Gigabit Ethernet MAC Controller is based on
+ Synopsys DesignWare MAC (version 3.73a).
+
+# We need a select here so we don't match all nodes with 'snps,dwmac'
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - nuvoton,ma35d1-dwmac
+ required:
+ - compatible
+
+allOf:
+ - $ref: snps,dwmac.yaml#
+
+properties:
+ compatible:
+ - items:
+ - enum:
+ - nuvoton,ma35d1-dwmac
+ - const: snps,dwmac-3.70a
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 2
+ items:
+ - description: MAC clock
+ - description: PTP clock
+
+ clock-names:
+ minItems: 2
+ items:
+ - const: stmmaceth
+ - const: ptp_ref
+
+ nuvoton,sys:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - items:
+ - description: phandle to access syscon registers.
+ - description: GMAC interface ID.
+ enum: [0, 1]
+ description:
+ A phandle to the syscon with one argument that configures system registers
+ for MA35D1's two GMACs. The argument specifies the GMAC interface ID.
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ items:
+ - const: stmmaceth
+
+ phy-mode:
+ enum:
+ - rmii
+ - rgmii
+ - rgmii-id
+ - rgmii-txid
+ - rgmii-rxid
+
+ phy-handle:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Specifies a reference to a node representing a PHY device.
+
+ tx-internal-delay-ps:
+ enum: [0, 2000]
+ default: 0
+ description:
+ RGMII TX path delay used only when PHY operates in RGMII mode with
+ internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
+
+ rx-internal-delay-ps:
+ enum: [0, 2000]
+ default: 0
+ description:
+ RGMII RX path delay used only when PHY operates in RGMII mode with
+ internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
+
+ mdio:
+ $ref: /schemas/net/mdio.yaml#
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - nuvoton,sys
+ - resets
+ - reset-names
+ - phy-mode
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
+ #include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
+ //Example 1
+ gmac0: ethernet@...20000 {
+ compatible = "nuvoton,ma35d1-dwmac";
+ reg = <0x0 0x40120000 0x0 0x10000>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ clocks = <&clk EMAC0_GATE>, <&clk EPLL_DIV8>;
+ clock-names = "stmmaceth", "ptp_ref";
+
+ nuvoton,sys = <&sys 0>;
+ resets = <&sys MA35D1_RESET_GMAC0>;
+ reset-names = "stmmaceth";
+
+ phy-mode = "rgmii-id";
+ phy-handle = <ð_phy0>;
+ mdio0 {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eth_phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+ };
+
+ - |
+ //Example 2
+ gmac1: ethernet@...30000 {
+ compatible = "nuvoton,ma35d1-dwmac";
+ reg = <0x0 0x40130000 0x0 0x10000>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ clocks = <&clk EMAC1_GATE>, <&clk EPLL_DIV8>;
+ clock-names = "stmmaceth", "ptp_ref";
+
+ nuvoton,sys = <&sys 1>;
+ resets = <&sys MA35D1_RESET_GMAC1>;
+ reset-names = "stmmaceth";
+
+ phy-mode = "rmii";
+ phy-handle = <ð_phy1>;
+ mdio1 {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eth_phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+ };
+ };
--
2.34.1
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