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Message-Id: <20241113-a4_pinctrl-v6-5-35ba2401ee35@amlogic.com>
Date: Wed, 13 Nov 2024 15:29:43 +0800
From: Xianwei Zhao via B4 Relay <devnull+xianwei.zhao.amlogic.com@...nel.org>
To: Linus Walleij <linus.walleij@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Neil Armstrong <neil.armstrong@...aro.org>,
Kevin Hilman <khilman@...libre.com>, Jerome Brunet <jbrunet@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Bartosz Golaszewski <brgl@...ev.pl>
Cc: linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-amlogic@...ts.infradead.org,
linux-kernel@...r.kernel.org, Xianwei Zhao <xianwei.zhao@...ogic.com>
Subject: [PATCH v6 5/5] arm64: dts: amlogic: a4: add pinctrl node
From: Xianwei Zhao <xianwei.zhao@...ogic.com>
Add pinctrl device to support Amlogic A4.
Reviewed-by: Neil Armstrong <neil.armstrong@...aro.org>
Signed-off-by: Xianwei Zhao <xianwei.zhao@...ogic.com>
---
arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 36 +++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
index de10e7aebf21..a176faf7f1ef 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
@@ -5,6 +5,7 @@
#include "amlogic-a4-common.dtsi"
#include <dt-bindings/power/amlogic,a4-pwrc.h>
+#include <dt-bindings/gpio/amlogic-gpio.h>
/ {
cpus {
#address-cells = <2>;
@@ -48,3 +49,38 @@ pwrc: power-controller {
};
};
};
+
+&apb {
+ periphs_pinctrl: pinctrl@...0 {
+ compatible = "amlogic,a4-periphs-pinctrl";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0x4000 0x0 0x02e0>;
+
+ gpio: bank@0 {
+ reg = <0x0 0x0 0x0 0x0050>,
+ <0x0 0xc0 0x0 0x0220>;
+ reg-names = "mux", "gpio";
+ gpio-controller;
+ #gpio-cells = <3>;
+ gpio-ranges = <&periphs_pinctrl 0 0 73>;
+ };
+ };
+
+ aobus_pinctrl: pinctrl@...00 {
+ compatible = "amlogic,a4-aobus-pinctrl";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0x8e700 0x0 0x0064>;
+
+ ao_gpio: bank@0 {
+ reg = <0x0 0x00 0x0 0x04>,
+ <0x0 0x04 0x0 0x60>;
+ reg-names = "mux", "gpio";
+ gpio-controller;
+ #gpio-cells = <3>;
+ gpio-ranges = <&aobus_pinctrl 0 0 8>;
+ };
+ };
+
+};
--
2.37.1
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