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Message-Id: <20241113133540.2005850-6-claudiu.beznea.uj@bp.renesas.com>
Date: Wed, 13 Nov 2024 15:35:20 +0200
From: Claudiu <claudiu.beznea@...on.dev>
To: geert+renesas@...der.be,
mturquette@...libre.com,
sboyd@...nel.org,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
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Cc: linux-renesas-soc@...r.kernel.org,
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devicetree@...r.kernel.org,
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claudiu.beznea@...on.dev,
Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: [PATCH v3 05/25] pinctrl: renesas: rzg2l: Add audio clock pins
From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Add audio clock pins. These are used by audio IPs as input pins to feed
them with audio clocks.
Reviewed-by: Biju Das <biju.das.jz@...renesas.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
---
Changes in v3:
- collected tags
Changes in v2:
- none
drivers/pinctrl/renesas/pinctrl-rzg2l.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index 8ffb9430a134..1190ca4b1808 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -2086,6 +2086,8 @@ static const struct rzg2l_dedicated_configs rzg3s_dedicated_pins[] = {
PIN_CFG_SOFT_PS)) },
{ "TDO", RZG2L_SINGLE_PIN_PACK(0x1, 1, (PIN_CFG_IOLH_A | PIN_CFG_SOFT_PS)) },
{ "WDTOVF_PERROUT#", RZG2L_SINGLE_PIN_PACK(0x6, 0, PIN_CFG_IOLH_A | PIN_CFG_SOFT_PS) },
+ { "AUDIO_CLK1", RZG2L_SINGLE_PIN_PACK(0x2, 0, PIN_CFG_IEN) },
+ { "AUDIO_CLK2", RZG2L_SINGLE_PIN_PACK(0x2, 1, PIN_CFG_IEN) },
{ "SD0_CLK", RZG2L_SINGLE_PIN_PACK(0x10, 0, (PIN_CFG_IOLH_B | PIN_CFG_IO_VMC_SD0)) },
{ "SD0_CMD", RZG2L_SINGLE_PIN_PACK(0x10, 1, (PIN_CFG_IOLH_B | PIN_CFG_IEN |
PIN_CFG_IO_VMC_SD0)) },
--
2.39.2
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