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Message-ID: <f987667a-5af9-468d-84eb-93051ed015f3@oss.qualcomm.com>
Date: Thu, 14 Nov 2024 16:26:45 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Yuvaraj Ranganathan <quic_yrangana@...cinc.com>,
Herbert Xu <herbert@...dor.apana.org.au>,
"David S. Miller" <davem@...emloft.net>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Vinod Koul <vkoul@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-crypto@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V3 2/2] arm64: dts: qcom: qcs8300: add TRNG node
On 13.11.2024 3:18 AM, Yuvaraj Ranganathan wrote:
> The qcs8300 SoC has a True Random Number Generator, add the node with
> the correct compatible set.
>
> Reviewed-by: Krzysztof Kozlowski <krzk+dt@...nel.org>
> Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@...cinc.com>
> ---
> arch/arm64/boot/dts/qcom/qcs8300.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
> index 2c35f96c3f28..2a3862568da2 100644
> --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
> @@ -588,6 +588,11 @@ &clk_virt SLAVE_QUP_CORE_0 0>,
> };
> };
>
> + rng@...2000 {
> + compatible = "qcom,qcs8300-trng", "qcom,trng";
> + reg = <0 0x010d2000 0 0x1000>;
> + };
> +
> config_noc: interconnect@...0000 {
> compatible = "qcom,qcs8300-config-noc";
> reg = <0x0 0x014c0000 0x0 0x13080>;
There's a jarring style difference visible looking just at this diff :/
Konrad
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