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Message-ID: <20241114162918.GS35230@nvidia.com>
Date: Thu, 14 Nov 2024 12:29:18 -0400
From: Jason Gunthorpe <jgg@...dia.com>
To: Uros Bizjak <ubizjak@...il.com>
Cc: Arnd Bergmann <arnd@...db.de>,
Suravee Suthikulpanit <suravee.suthikulpanit@....com>,
linux-kernel@...r.kernel.org, iommu@...ts.linux.dev,
Joerg Roedel <joro@...tes.org>, Robin Murphy <robin.murphy@....com>,
vasant.hegde@....com, Linux-Arch <linux-arch@...r.kernel.org>,
Kevin Tian <kevin.tian@...el.com>, jon.grimm@....com,
santosh.shukla@....com, pandoh@...gle.com, kumaranand@...gle.com
Subject: Re: [PATCH v10 05/10] iommu/amd: Introduce helper function to update
256-bit DTE
On Wed, Nov 13, 2024 at 08:50:08PM +0100, Uros Bizjak wrote:
> Then write_dte_upper128() would look like:
>
> static void write_dte_upper128(struct dev_table_entry *ptr, struct
> dev_table_entry *new)
> {
> struct dev_table_entry old = {}; <--- do we need to initialize struct here?
>
> old.data128[1] = ptr->data128[1];
>
> /*
> * Preserve DTE_DATA2_INTR_MASK. This needs to be
> * done here since it requires to be inside
> * spin_lock(&dev_data->dte_lock) context.
> */
> new->data[2] &= ~DTE_DATA2_INTR_MASK;
> new->data[2] |= old.data[2] & DTE_DATA2_INTR_MASK;
>
> iommu_atomic128_set(&ptr->data128[1], new->data128[1]);
> }
>
> and in a similar way implement write_dte_lower128().
That makes sense to me, but also we have drifted really far from the
purpose of this series and missed this merge window because of this :\
Let's conclude something please
Jason
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