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Message-ID: <20241114-convene-reseller-84a0bcd98882@spud>
Date: Thu, 14 Nov 2024 20:11:35 +0000
From: Conor Dooley <conor@...nel.org>
To: MD Danish Anwar <danishanwar@...com>
Cc: conor+dt@...nel.org, krzk+dt@...nel.org, robh@...nel.org,
	ssantosh@...nel.org, nm@...com,
	Vignesh Raghavendra <vigneshr@...com>, devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	s-anna@...com, kristo@...nel.org, srk@...com,
	Roger Quadros <rogerq@...nel.org>
Subject: Re: [PATCH v3 1/2] dt-bindings: soc: ti: pruss: Add clocks for ICSSG

On Wed, Nov 13, 2024 at 04:39:54PM +0530, MD Danish Anwar wrote:
> The ICSSG module has 7 clocks for each instance.
> 
> These clocks are ICSSG0_CORE_CLK, ICSSG0_IEP_CLK, ICSSG0_ICLK,
> ICSSG0_UART_CLK, RGMII_MHZ_250_CLK, RGMII_MHZ_50_CLK and RGMII_MHZ_5_CLK
> These clocks are described in AM64x TRM Section 6.4.3 Table 6-398.
> 
> Add these clocks to the dt binding of ICSSG.
> 
> Link: https://www.ti.com/lit/pdf/spruim2 (AM64x TRM)
> Signed-off-by: MD Danish Anwar <danishanwar@...com>

Acked-by: Conor Dooley <conor.dooley@...rochip.com>

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