linux-kernel - Re: [PATCH v2 08/10] clk: eyeq: add EyeQ6H west fixed factor clocks

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Message-ID: <2e82fec5209d888f934af796bb9a7ceb.sboyd@kernel.org>
Date: Thu, 14 Nov 2024 15:00:26 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: Conor Dooley <conor+dt@...nel.org>, Grégory Clement <gregory.clement@...tlin.com>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Michael Turquette <mturquette@...libre.com>, Rob Herring <robh@...nel.org>, Thomas Bogendoerfer <tsbogend@...ha.franken.de>, Théo Lebrun <theo.lebrun@...tlin.com>, Vladimir Kondratiev <vladimir.kondratiev@...ileye.com>
Cc: linux-mips@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org, Thomas Petazzoni <thomas.petazzoni@...tlin.com>, Tawfik Bayouk <tawfik.bayouk@...ileye.com>, Théo Lebrun <theo.lebrun@...tlin.com>
Subject: Re: [PATCH v2 08/10] clk: eyeq: add EyeQ6H west fixed factor clocks

Quoting Théo Lebrun (2024-11-06 08:03:59)
> Previous setup was:
>  - pll-west clock registered from driver at of_clk_init();
>  - Both OCC and UART clocks registered from DT using fixed-factor-clock
>    compatible.
> 
> Now that drivers/clk/clk-eyeq.c supports registering fixed factors, use
> that capability to register west-per-occ and west-per-uart (giving them
> proper names at the same time).
> 
> Also switch from hard-coded index 0 for pll-west to using the
> EQ6HC_WEST_PLL_PER constant by exposed dt-bindings headers.
> 
> All get exposed at of_clk_init() because they get used by the AMBA PL011
> serial ports. Those are instantiated before platform bus infrastructure.
> 
> Signed-off-by: Théo Lebrun <theo.lebrun@...tlin.com>
> ---

Applied to clk-next