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Message-ID: <202411140748.6mcFdJdO-lkp@intel.com>
Date: Thu, 14 Nov 2024 08:05:07 +0800
From: kernel test robot <lkp@...el.com>
To: Bibek Kumar Patro <quic_bibekkum@...cinc.com>, robdclark@...il.com,
will@...nel.org, robin.murphy@....com, joro@...tes.org,
jgg@...pe.ca, jsnitsel@...hat.com, robh@...nel.org,
krzysztof.kozlowski@...aro.org, quic_c_gdjako@...cinc.com,
dmitry.baryshkov@...aro.org
Cc: oe-kbuild-all@...ts.linux.dev, iommu@...ts.linux.dev,
linux-arm-msm@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, quic_bibekkum@...cinc.com
Subject: Re: [PATCH v17 1/5] iommu/arm-smmu: re-enable context caching in
smmu reset operation
Hi Bibek,
kernel test robot noticed the following build warnings:
[auto build test WARNING on linus/master]
[also build test WARNING on joro-iommu/next v6.12-rc7 next-20241113]
[cannot apply to arm64/for-next/core]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Bibek-Kumar-Patro/iommu-arm-smmu-re-enable-context-caching-in-smmu-reset-operation/20241113-042646
base: linus/master
patch link: https://lore.kernel.org/r/20241112165454.2698269-2-quic_bibekkum%40quicinc.com
patch subject: [PATCH v17 1/5] iommu/arm-smmu: re-enable context caching in smmu reset operation
config: powerpc64-randconfig-r064-20241114 (https://download.01.org/0day-ci/archive/20241114/202411140748.6mcFdJdO-lkp@intel.com/config)
compiler: clang version 20.0.0git (https://github.com/llvm/llvm-project 592c0fe55f6d9a811028b5f3507be91458ab2713)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241114/202411140748.6mcFdJdO-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202411140748.6mcFdJdO-lkp@intel.com/
All warnings (new ones prefixed by >>):
In file included from drivers/iommu/arm/arm-smmu/arm-smmu-impl.c:10:
In file included from drivers/iommu/arm/arm-smmu/arm-smmu.h:18:
In file included from include/linux/io-64-nonatomic-hi-lo.h:5:
In file included from include/linux/io.h:14:
In file included from arch/powerpc/include/asm/io.h:24:
In file included from include/linux/mm.h:2213:
include/linux/vmstat.h:518:36: warning: arithmetic between different enumeration types ('enum node_stat_item' and 'enum lru_list') [-Wenum-enum-conversion]
518 | return node_stat_name(NR_LRU_BASE + lru) + 3; // skip "nr_"
| ~~~~~~~~~~~ ^ ~~~
>> drivers/iommu/arm/arm-smmu/arm-smmu-impl.c:113:6: warning: unused variable 'i' [-Wunused-variable]
113 | int i;
| ^
2 warnings generated.
vim +/i +113 drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 109
759aaa10c76cba drivers/iommu/arm-smmu-impl.c Vivek Gautam 2019-09-20 110 int arm_mmu500_reset(struct arm_smmu_device *smmu)
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 111 {
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 112 u32 reg, major;
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 @113 int i;
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 114 /*
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 115 * On MMU-500 r2p0 onwards we need to clear ACR.CACHE_LOCK before
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 116 * writes to the context bank ACTLRs will stick. And we just hope that
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 117 * Secure has also cleared SACR.CACHE_LOCK for this to take effect...
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 118 */
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 119 reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_ID7);
fba6e960772b7b drivers/iommu/arm-smmu-impl.c Will Deacon 2020-01-10 120 major = FIELD_GET(ARM_SMMU_ID7_MAJOR, reg);
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 121 reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sACR);
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 122 if (major >= 2)
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 123 reg &= ~ARM_MMU500_ACR_CACHE_LOCK;
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 124 /*
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 125 * Allow unmatched Stream IDs to allocate bypass
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 126 * TLB entries for reduced latency.
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 127 */
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 128 reg |= ARM_MMU500_ACR_SMTNMB_TLBEN | ARM_MMU500_ACR_S2CRB_TLBEN;
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 129 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sACR, reg);
62b993a36e4c2d drivers/iommu/arm-smmu-impl.c Robin Murphy 2019-08-15 130
--
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