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Message-ID: <20241114140023.3534980-3-cl634@andestech.com>
Date: Thu, 14 Nov 2024 22:00:22 +0800
From: CL Wang <cl634@...estech.com>
To: <cl634@...estech.com>, <alexandre.belloni@...tlin.com>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>
CC: <linux-kernel@...r.kernel.org>, <tim609@...estech.com>
Subject: [PATCH V4 RESEND 2/3] dt-bindings: rtc: Add support for ATCRTC100 RTC
Document Device Tree bindings for the Andes ATCRTC100 Real-Time Clock.
Signed-off-by: CL Wang <cl634@...estech.com>
---
Changes for v2:
- First version of devicetree bindings for the Andes ATCRTC100 Real-Time Clock.
Changes for v3:
- Used compatible as the filename.
- Placed allOf after maintainers.
- Replaced additionalProperties: false with unevaluatedProperties: false.
- Added descriptions for interrupts.
Changes for v4:
- Removed wakeup-source attribute.
---
.../bindings/rtc/andestech,atcrtc100.yaml | 43 +++++++++++++++++++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/rtc/andestech,atcrtc100.yaml
diff --git a/Documentation/devicetree/bindings/rtc/andestech,atcrtc100.yaml b/Documentation/devicetree/bindings/rtc/andestech,atcrtc100.yaml
new file mode 100644
index 000000000000..ec0a736793c7
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/andestech,atcrtc100.yaml
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rtc/andestech,atcrtc100.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Andes ATCRTC100 Real-Time Clock
+
+maintainers:
+ - CL Wang <cl634@...estech.com>
+
+allOf:
+ - $ref: rtc.yaml#
+
+properties:
+ compatible:
+ enum:
+ - andestech,atcrtc100
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: Periodic timekeeping interrupt
+ - description: RTC alarm interrupt
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ rtc@...00000 {
+ compatible = "andestech,atcrtc100";
+ reg = <0xf0300000 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH>, <2 IRQ_TYPE_LEVEL_HIGH>;
+ };
--
2.34.1
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