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Message-ID: <vfl3mvq7wn5f4ke2df3hsdd65cmhb6lw4kbzpharo75ufzmayt@e4w76fjipy2m>
Date: Fri, 15 Nov 2024 22:49:35 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Ziyue Zhang <quic_ziyuzhan@...cinc.com>
Cc: vkoul@...nel.org, kishon@...nel.org, robh+dt@...nel.org,
manivannan.sadhasivam@...aro.org, bhelgaas@...gle.com, kw@...ux.com, lpieralisi@...nel.org,
quic_qianyu@...cinc.com, conor+dt@...nel.org, neil.armstrong@...aro.org,
andersson@...nel.org, konradybcio@...nel.org, quic_shashim@...cinc.com,
quic_kaushalk@...cinc.com, quic_tdas@...cinc.com, quic_tingweiz@...cinc.com,
quic_aiquny@...cinc.com, kernel@...cinc.com, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-phy@...ts.infradead.org
Subject: Re: [PATCH 2/5] phy: qcom-qmp-pcie: add dual lane PHY support for
QCS8300
On Thu, Nov 14, 2024 at 05:54:06PM +0800, Ziyue Zhang wrote:
> The PCIe Gen4x2 PHY for qcs8300 has a lot of difference with sa8775p.
> So the qcs8300_qmp_gen4x2_pcie_rx_alt_tbl for qcs8300 is added.
>
> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@...cinc.com>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 89 ++++++++++++++++++++++++
> 1 file changed, 89 insertions(+)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
--
With best wishes
Dmitry
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