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Message-ID: <20241115225152.3264396-1-quic_wasimn@quicinc.com>
Date: Sat, 16 Nov 2024 04:21:47 +0530
From: Wasim Nazir <quic_wasimn@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, kernel@...cinc.com,
Wasim Nazir <quic_wasimn@...cinc.com>
Subject: [PATCH v2 0/5] arm64: qcom: Add support for QCS9075 boards
This series:
Add support for Qualcomm's rb8, ride/ride-r3 boards using QCS9075 SoC.
QCS9075 is compatible IoT-industrial grade variant of SA8775p SoC
without safety monitorng feature of SAfetyIsLand subsystem.
This subsystem continues to supports other features like built-in
self-test, error-detection, reset-handling, etc.
Changelog:
v2:
- Remove unused dp nodes & update commit for ride vs ride-r3.
v1: https://lore.kernel.org/all/20241110145339.3635437-1-quic_wasimn@quicinc.com/
Wasim Nazir (5):
dt-bindings: arm: qcom,ids: add SoC ID for QCS9075
soc: qcom: socinfo: add QCS9075 SoC ID
dt-bindings: arm: qcom: Document rb8/ride/ride-r3 on QCS9075
arm64: dts: qcom: Add support for QCS9075 RB8
arm64: dts: qcom: Add support for QCS9075 Ride & Ride-r3
.../devicetree/bindings/arm/qcom.yaml | 9 +
arch/arm64/boot/dts/qcom/Makefile | 3 +
arch/arm64/boot/dts/qcom/qcs9075-rb8.dts | 281 ++++++++++++++++++
arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 12 +
arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 12 +
drivers/soc/qcom/socinfo.c | 1 +
include/dt-bindings/arm/qcom,ids.h | 1 +
7 files changed, 319 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-rb8.dts
create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts
create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride.dts
base-commit: 929beafbe7acce3267c06115e13e03ff6e50548a
--
2.47.0
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