lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZzcKoOXTVVj3bTnE@wunner.de>
Date: Fri, 15 Nov 2024 09:47:28 +0100
From: Lukas Wunner <lukas@...ner.de>
To: "Bowman, Terry" <terry.bowman@....com>
Cc: linux-cxl@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-pci@...r.kernel.org, nifan.cxl@...il.com, ming4.li@...el.com,
	dave@...olabs.net, jonathan.cameron@...wei.com,
	dave.jiang@...el.com, alison.schofield@...el.com,
	vishal.l.verma@...el.com, dan.j.williams@...el.com,
	bhelgaas@...gle.com, mahesh@...ux.ibm.com, ira.weiny@...el.com,
	oohall@...il.com, Benjamin.Cheatham@....com, rrichter@....com,
	nathan.fontenot@....com, Smita.KoralahalliChannabasappa@....com
Subject: Re: [PATCH v3 03/15] cxl/pci: Introduce PCIe helper functions
 pcie_is_cxl() and pcie_is_cxl_port()

On Thu, Nov 14, 2024 at 11:07:26AM -0600, Bowman, Terry wrote:
> > Can you have a CXL port that is not a CXL device?
> >
> > If not, it would seem to me that checking for Flexbus DVSEC presence
> > *is* redundant.  Or do you anticipate broken devices which lack the
> > Flexbus DVSEC and that you explicitly want to exclude?
> 
> No, the CXL port device is always a CXL device per spec.
> 
> This was added to short-circuit the function by returning immediately
> if the device is _not_ a CXL device. Otherwise for PCIe Port devices,
> the CXL Port DVSEC will be searched. I was trying to avoid the unnecessary
> CXL port DVSEC search unless the other criteria are met.
> And I expect most cases will not be a CXL device.
> 
> I will remove the "if (!pcie_is_cxl(dev))" block as you suggested.

Ah, this is meant as a speed-up.  Actually that makes sense,
so feel free to keep it.

If you do remove it, I think you'll have to move the cxl_port_dvsec()
invocation up in the function, in front of the pci_pcie_type() checks.
The latter require that one first checks that the device is PCIe.
That's done implicitly by cxl_port_dvsec() because it returns 0 in
the non-PCIe case.  (Due to the "if (dev->cfg_size <= PCI_CFG_SPACE_SIZE)"
check in pci_find_next_ext_capability().)

Another idea would be to put a "if (!pcie_is_cxl(dev)) return 0;" speed-up
in cxl_port_dvsec() so that the other caller benefits from it as well.

Thanks,

Lukas

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ