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Message-ID: <20241115132631.264609-1-bastien.curutchet@bootlin.com>
Date: Fri, 15 Nov 2024 14:26:21 +0100
From: Bastien Curutchet <bastien.curutchet@...tlin.com>
To: Santosh Shilimkar <ssantosh@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>
Cc: linux-kernel@...r.kernel.org,
linux-mtd@...ts.infradead.org,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Herve Codina <herve.codina@...tlin.com>,
Christopher Cordahi <christophercordahi@...ometrics.ca>,
Bastien Curutchet <bastien.curutchet@...tlin.com>
Subject: [PATCH v4 00/10] Implement setup_interface() in the DaVinci NAND controller
Hi all,
This patch series aims to implement the setup_interface() operation in
the DaVinci NAND controller to enable the use of all ONFI modes and
improve the NAND access speed.
PATCH 6 depends on PATCH 1-2-3-4-5
PATCH 10 depends on PATCH 6-8-9
This NAND controller is present in the DaVinci (OMAP L138) and Keystone2
SoCs and functions as a 'child' of the AEMIF controller. So its timings
are set by the AEMIF controller itself from device-tree properties.
Implementing the setup_interface() callback implies being able to update
dynamically these timings, so the first three patches of the series modify
the AEMIF driver to provide its 'children' a way to modify their chip
select timing configuration.
The remaining patches implement the setup_interface() operation.
The computation of the register's contents is directly based on
ยง20.3.2.3 of the OMAP-L138 TRM [1]
This has been tested on two platforms based upon the DaVinci SoC. One is
interfaced with a Macronix MX30UF4G18AC NAND, the other with a Toshiba
NAND.
[1] : https://www.ti.com/lit/ug/spruh77c/spruh77c.pdf
Change log:
* v4
PATCH 1,2,3 [new]:
- Create the struct aemif_cs_timings inside the already existing
struct aemif_cs_data
* v3
PATCH 1 [new]:
- Wrap the verification of CS timing configuration into a function
PATCH 2:
- Fix comments
PATCH 3:
- Replace the spin-lock with a mutex
PATCH 7:
- Add handling of the NAND_DATA_IFACE_CHECK_ONLY case
- setup_interface() returns errno on failures
* v2
Cover letter :
- Add dependency details
- Remove the question about ti-aemif.h location
PATCH 1 :
- Fix aemif_cs_timings's description in the comments
PATCH 2 :
- Fix typo in the config_cs_lock's description in the comments
- Move include/memory/ti-aemif.h to include/linux/memory/ti-aemif.h
PATCH 3 [NEW] :
- Fix dependency issue with aemif controller in Kconfig
PATCH 5 :
- Add details about the clock bindings in the commit log
- Replace devm_clk_get() with devm_clk_get_enabled()
- Use dev_err_probe() to return the devm_clk_get_enabled() error
[v1] : https://lore.kernel.org/all/20241030104717.88688-1-bastien.curutchet@bootlin.com/
[v2] : https://lore.kernel.org/all/20241106085507.76425-1-bastien.curutchet@bootlin.com/
[v3] : https://lore.kernel.org/all/20241113094938.44817-1-bastien.curutchet@bootlin.com/
Bastien Curutchet (10):
memory: ti-aemif: Store timings parameter in number of cycles - 1
memory: ti-aemif: Remove unnecessary local variables
memory: ti-aemif: Wrap CS timings into a struct
memory: ti-aemif: Create aemif_check_cs_timings()
memory: ti-aemif: Create aemif_set_cs_timings()
memory: ti-aemif: Export aemif_*_cs_timings()
mtd: rawnand: davinci: Always depends on TI_AEMIF
mtd: rawnand: davinci: Order headers alphabetically
mtd: rawnand: davinci: Add clock resource
mtd: rawnand: davinci: Implement setup_interface() operation
drivers/memory/ti-aemif.c | 187 +++++++++++++++++-----------
drivers/mtd/nand/raw/Kconfig | 4 +-
drivers/mtd/nand/raw/davinci_nand.c | 94 +++++++++++++-
include/linux/memory/ti-aemif.h | 32 +++++
4 files changed, 237 insertions(+), 80 deletions(-)
create mode 100644 include/linux/memory/ti-aemif.h
--
2.47.0
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