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Message-ID: <iupphuswrncjbkopirlodb4d45qvvu65cl4vyyqqmuv3zouq2a@cnvooym4ouh2>
Date: Fri, 15 Nov 2024 17:32:25 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Melody Olvera <quic_molvera@...cinc.com>
Cc: Bjorn Andersson <andersson@...nel.org>, 
	Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Taniya Das <quic_tdas@...cinc.com>, Trilok Soni <quic_tsoni@...cinc.com>, 
	Satya Durga Srinivasu Prabhala <quic_satyap@...cinc.com>, linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 3/7] clk: qcom: clk-alpha-pll: Add support for
 controlling Taycan PLLs

On Mon, Nov 11, 2024 at 04:28:03PM -0800, Melody Olvera wrote:
> From: Taniya Das <quic_tdas@...cinc.com>
> 
> Add clock ops for Taycan PLL, add the register offsets for supporting
> the PLL.
> 
> Signed-off-by: Taniya Das <quic_tdas@...cinc.com>
> Signed-off-by: Melody Olvera <quic_molvera@...cinc.com>
> ---
>  drivers/clk/qcom/clk-alpha-pll.c | 14 ++++++++++++++
>  drivers/clk/qcom/clk-alpha-pll.h |  7 +++++++
>  2 files changed, 21 insertions(+)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>

-- 
With best wishes
Dmitry

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