lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <a9549e7a-4808-4020-852f-db5a19291da4@yandex-team.ru>
Date: Sat, 16 Nov 2024 13:34:27 +0300
From: Maksim Davydov <davydov-max@...dex-team.ru>
To: babu.moger@....com
Cc: linux-kernel@...r.kernel.org, kvm@...r.kernel.org, x86@...nel.org,
 seanjc@...gle.com, sandipan.das@....com, bp@...en8.de, mingo@...hat.com,
 tglx@...utronix.de, dave.hansen@...ux.intel.com, hpa@...or.com,
 pbonzini@...hat.com
Subject: Re: [PATCH 1/2] x86: KVM: Advertise FSRS and FSRC on AMD to userspace

Hi!

On 11/15/24 22:51, Moger, Babu wrote:
> Hi Maksim,
> 
> On 11/13/2024 7:30 AM, Maksim Davydov wrote:
>> Fast short REP STOSB and fast short CMPSB support on AMD processors are
>> provided in other CPUID function in comparison with Intel processors:
>> * FSRS: 10 bit in 0x80000021_EAX
>> * FSRC: 11 bit in 0x80000021_EAX
>>
>> AMD bit numbers differ from existing definition of FSRC and
>> FSRS. So, the new appropriate values have to be added with new names.
>>
>> It's safe to advertise these features to userspace because they are a 
>> part
>> of CPU model definition and they can't be disabled (as existing Intel
>> features).
>>
>> Fixes: 2a4209d6a9cb ("KVM: x86: Advertise fast REP string features 
>> inherent to the CPU")
>> Signed-off-by: Maksim Davydov <davydov-max@...dex-team.ru>
>> ---
>>   arch/x86/include/asm/cpufeatures.h | 2 ++
>>   arch/x86/kvm/cpuid.c               | 4 ++--
>>   2 files changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/x86/include/asm/cpufeatures.h 
>> b/arch/x86/include/asm/cpufeatures.h
>> index 913fd3a7bac6..2f8a858325a4 100644
>> --- a/arch/x86/include/asm/cpufeatures.h
>> +++ b/arch/x86/include/asm/cpufeatures.h
>> @@ -457,6 +457,8 @@
>>   #define X86_FEATURE_NULL_SEL_CLR_BASE    (20*32+ 6) /* Null Selector 
>> Clears Base */
>>   #define X86_FEATURE_AUTOIBRS        (20*32+ 8) /* Automatic IBRS */
>>   #define X86_FEATURE_NO_SMM_CTL_MSR    (20*32+ 9) /* SMM_CTL MSR is 
>> not present */
>> +#define X86_FEATURE_AMD_FSRS            (20*32+10) /* AMD Fast short 
>> REP STOSB supported */
>> +#define X86_FEATURE_AMD_FSRC        (20*30+11) /* AMD Fast short REP 

Sorry
I made a mistake (30 instead of 32) while preparing the patch.
I'll prepare the new version.

>> CMPSB supported */
>>   #define X86_FEATURE_SBPB        (20*32+27) /* Selective Branch 
>> Prediction Barrier */
>>   #define X86_FEATURE_IBPB_BRTYPE        (20*32+28) /* 
>> MSR_PRED_CMD[IBPB] flushes all branch type predictions */
>> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
>> index 41786b834b16..30ce1bcfc47f 100644
>> --- a/arch/x86/kvm/cpuid.c
>> +++ b/arch/x86/kvm/cpuid.c
>> @@ -793,8 +793,8 @@ void kvm_set_cpu_caps(void)
>>       kvm_cpu_cap_mask(CPUID_8000_0021_EAX,
>>           F(NO_NESTED_DATA_BP) | F(LFENCE_RDTSC) | 0 /* SmmPgCfgLock */ |
>> -        F(NULL_SEL_CLR_BASE) | F(AUTOIBRS) | 0 /* PrefetchCtlMsr */ |
>> -        F(WRMSR_XX_BASE_NS)
>> +        F(NULL_SEL_CLR_BASE) | F(AUTOIBRS) | F(AMD_FSRS) |
>> +        F(AMD_FSRC) | 0 /* PrefetchCtlMsr */ | F(WRMSR_XX_BASE_NS)
> 
> KVM still does not report AMD_FSRC.
> 
> The KVM_GET_SUPPORTED_CPUID output for the function 0x80000021.
> 
> {0x80000021, 0000, eax = 0x1800074f, ebx= 0000000000, ecx = 0000000000, 
> edx= 0000000000}, /* 0 */
> 
> 
> 
>>       );
>>       kvm_cpu_cap_check_and_set(X86_FEATURE_SBPB);
> 

-- 
Best regards,
Maksim Davydov

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ