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Message-ID: <gecz9pMRccdD2v_dImhonTGStG4FmiUko8IM2fkc9Rh2thw_QuSOvlsYTspZSf9bjtidQOD2uVL2aSaQ29-neWABRm1cpyXQr6xV0wELTU0=@protonmail.com>
Date: Sat, 16 Nov 2024 23:44:37 +0000
From: Koakuma <koachan@...tonmail.com>
To: Andreas Larsson <andreas@...sler.com>
Cc: "David S. Miller" <davem@...emloft.net>, Andy Lutomirski <luto@...nel.org>, Thomas Gleixner <tglx@...utronix.de>, Vincenzo Frascino <vincenzo.frascino@....com>, Nathan Chancellor <nathan@...nel.org>, Nick Desaulniers <ndesaulniers@...gle.com>, Bill Wendling <morbo@...gle.com>, Justin Stitt <justinstitt@...gle.com>, sparclinux@...r.kernel.org, linux-kernel@...r.kernel.org, llvm@...ts.linux.dev
Subject: Re: [PATCH v2] sparc/vdso: Add helper function for 64-bit right shift on 32-bit target
Andreas Larsson <andreas@...sler.com> wrote:
> Koakuma via B4 Relay wrote:
> > +notrace static __always_inline u64 __shr64(u64 val, int amt)
> > +{
> > + u64 ret;
> > +
> > + asm volatile("sllx %H1, 32, %%g1\n\t"
> > + "srl %L1, 0, %L1\n\t"
> > + "or %%g1, %L1, %%g1\n\t"
> > + "srlx %%g1, %2, %L0\n\t"
> > + "srlx %L0, 32, %H0"
> > + : "=r" (ret)
> > + : "r" (val), "r" (amt)
> > + : "g1");
> > + return ret;
> > +}
>
> Can not residual in bits 63:32 of %L0 potentially pose a problem?
It shouldn't be a problem, upon returning the caller should treat
the upper bits of %L0 as an unspecified value and not depend on/use
its contents.
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