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Message-ID: <6fd79a88-bab4-477c-aaf0-0dffb80e103c@quicinc.com>
Date: Mon, 18 Nov 2024 09:01:58 +0800
From: Yijie Yang <quic_yijiyang@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
        Bjorn Andersson
	<andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring
	<robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
	<conor+dt@...nel.org>,
        Richard Cochran <richardcochran@...il.com>
CC: <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <netdev@...r.kernel.org>,
        <quic_tingweiz@...cinc.com>, <quic_aiquny@...cinc.com>
Subject: Re: [PATCH 1/2] arm64: dts: qcom: qcs615: add ethernet node



On 2024-11-16 03:11, Konrad Dybcio wrote:
> On 10.10.2024 5:05 AM, Yijie Yang wrote:
>> Add ethqos ethernet controller node for QCS615 SoC.
>>
>> Signed-off-by: Yijie Yang <quic_yijiyang@...cinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/qcs615.dtsi | 27 +++++++++++++++++++++++++++
>>   1 file changed, 27 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
>> index 0d8fb557cf48..ba737cd89679 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
>> @@ -420,6 +420,33 @@ soc: soc@0 {
>>   		#address-cells = <2>;
>>   		#size-cells = <2>;
>>   
>> +		ethernet: ethernet@...00 {
>> +			compatible = "qcom,qcs615-ethqos", "qcom,sm8150-ethqos";
>> +			reg = <0x0 0x20000 0x0 0x10000>,
>> +			      <0x0 0x36000 0x0 0x100>;
> 
> Please pad the address part to 8 hex digits with leading zeroes
> 
>> +			reg-names = "stmmaceth", "rgmii";
>> +
>> +			clocks = <&gcc GCC_EMAC_AXI_CLK>,
>> +			         <&gcc GCC_EMAC_SLV_AHB_CLK>,
>> +			         <&gcc GCC_EMAC_PTP_CLK>,
>> +			         <&gcc GCC_EMAC_RGMII_CLK>;
>> +			clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
> 
> Please make this a vertical list, just like clocks

Sure, I will revise.

> 
> Konrad

-- 
Best Regards,
Yijie


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