| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID:
<MN0PR12MB595399792A32D8832F1B54EAB7272@MN0PR12MB5953.namprd12.prod.outlook.com>
Date: Mon, 18 Nov 2024 14:42:57 +0000
From: "Pandey, Radhey Shyam" <radhey.shyam.pandey@....com>
To: "Gupta, Suraj" <Suraj.Gupta2@....com>, "andrew+netdev@...n.ch"
<andrew+netdev@...n.ch>, "davem@...emloft.net" <davem@...emloft.net>,
"edumazet@...gle.com" <edumazet@...gle.com>, "kuba@...nel.org"
<kuba@...nel.org>, "pabeni@...hat.com" <pabeni@...hat.com>, "Simek, Michal"
<michal.simek@....com>, "sean.anderson@...ux.dev" <sean.anderson@...ux.dev>,
"horms@...nel.org" <horms@...nel.org>
CC: "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>, "git (AMD-Xilinx)" <git@....com>, "Katakam,
Harini" <harini.katakam@....com>
Subject: RE: [PATCH net-next 2/2] net: axienet: Add support for AXI 2.5G MAC
> -----Original Message-----
> From: Suraj Gupta <suraj.gupta2@....com>
> Sent: Monday, November 18, 2024 1:48 PM
> To: andrew+netdev@...n.ch; davem@...emloft.net; edumazet@...gle.com;
> kuba@...nel.org; pabeni@...hat.com; Simek, Michal <michal.simek@....com>;
> sean.anderson@...ux.dev; Pandey, Radhey Shyam
> <radhey.shyam.pandey@....com>; horms@...nel.org
> Cc: netdev@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-
> kernel@...r.kernel.org; git (AMD-Xilinx) <git@....com>; Katakam, Harini
> <harini.katakam@....com>
> Subject: [PATCH net-next 2/2] net: axienet: Add support for AXI 2.5G MAC
>
> Add AXI 2.5G MAC support, which is an incremental speed upgrade
> of AXI 1G MAC and supports 2.5G speed only. "max-speed" DT property
> is used in driver to distinguish 1G and 2.5G MACs of AXI 1G/2.5G IP.
> If max-speed property is missing, 1G is assumed to support backward
> compatibility.
>
> Co-developed-by: Harini Katakam <harini.katakam@....com>
> Signed-off-by: Harini Katakam <harini.katakam@....com>
> Signed-off-by: Suraj Gupta <suraj.gupta2@....com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@....com>
Thanks!
> ---
> drivers/net/ethernet/xilinx/xilinx_axienet.h | 4 +++-
> .../net/ethernet/xilinx/xilinx_axienet_main.c | 24 +++++++++++++++----
> 2 files changed, 22 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet.h
> b/drivers/net/ethernet/xilinx/xilinx_axienet.h
> index d64b8abcf018..ebad1c147aa2 100644
> --- a/drivers/net/ethernet/xilinx/xilinx_axienet.h
> +++ b/drivers/net/ethernet/xilinx/xilinx_axienet.h
> @@ -274,7 +274,7 @@
> #define XAE_EMMC_RX16BIT 0x01000000 /* 16 bit Rx client enable */
> #define XAE_EMMC_LINKSPD_10 0x00000000 /* Link Speed mask for 10 Mbit */
> #define XAE_EMMC_LINKSPD_100 0x40000000 /* Link Speed mask for
> 100 Mbit */
> -#define XAE_EMMC_LINKSPD_1000 0x80000000 /* Link Speed mask for
> 1000 Mbit */
> +#define XAE_EMMC_LINKSPD_1000_2500 0x80000000 /* Link Speed
> mask for 1000 or 2500 Mbit */
>
> /* Bit masks for Axi Ethernet PHYC register */
> #define XAE_PHYC_SGMIILINKSPEED_MASK 0xC0000000 /* SGMII link
> speed mask*/
> @@ -542,6 +542,7 @@ struct skbuf_dma_descriptor {
> * @tx_ring_tail: TX skb ring buffer tail index.
> * @rx_ring_head: RX skb ring buffer head index.
> * @rx_ring_tail: RX skb ring buffer tail index.
> + * @max_speed: Maximum possible MAC speed.
> */
> struct axienet_local {
> struct net_device *ndev;
> @@ -620,6 +621,7 @@ struct axienet_local {
> int tx_ring_tail;
> int rx_ring_head;
> int rx_ring_tail;
> + u32 max_speed;
> };
>
> /**
> diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> index 273ec5f70005..52a3703bd604 100644
> --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> @@ -2388,6 +2388,7 @@ static struct phylink_pcs *axienet_mac_select_pcs(struct
> phylink_config *config,
> struct axienet_local *lp = netdev_priv(ndev);
>
> if (interface == PHY_INTERFACE_MODE_1000BASEX ||
> + interface == PHY_INTERFACE_MODE_2500BASEX ||
> interface == PHY_INTERFACE_MODE_SGMII)
> return &lp->pcs;
>
> @@ -2421,8 +2422,9 @@ static void axienet_mac_link_up(struct phylink_config
> *config,
> emmc_reg &= ~XAE_EMMC_LINKSPEED_MASK;
>
> switch (speed) {
> + case SPEED_2500:
> case SPEED_1000:
> - emmc_reg |= XAE_EMMC_LINKSPD_1000;
> + emmc_reg |= XAE_EMMC_LINKSPD_1000_2500;
> break;
> case SPEED_100:
> emmc_reg |= XAE_EMMC_LINKSPD_100;
> @@ -2432,7 +2434,7 @@ static void axienet_mac_link_up(struct phylink_config
> *config,
> break;
> default:
> dev_err(&ndev->dev,
> - "Speed other than 10, 100 or 1Gbps is not supported\n");
> + "Speed other than 10, 100, 1Gbps or 2.5Gbps is not
> supported\n");
> break;
> }
>
> @@ -2681,6 +2683,12 @@ static int axienet_probe(struct platform_device *pdev)
> lp->switch_x_sgmii = of_property_read_bool(pdev->dev.of_node,
> "xlnx,switch-x-sgmii");
>
> + ret = of_property_read_u32(pdev->dev.of_node, "max-speed", &lp-
> >max_speed);
> + if (ret) {
> + lp->max_speed = SPEED_1000;
> + netdev_warn(ndev, "Please upgrade your device tree to use max-
> speed\n");
> + }
> +
> /* Start with the proprietary, and broken phy_type */
> ret = of_property_read_u32(pdev->dev.of_node, "xlnx,phy-type", &value);
> if (!ret) {
> @@ -2854,7 +2862,8 @@ static int axienet_probe(struct platform_device *pdev)
> "error registering MDIO bus: %d\n", ret);
>
> if (lp->phy_mode == PHY_INTERFACE_MODE_SGMII ||
> - lp->phy_mode == PHY_INTERFACE_MODE_1000BASEX) {
> + lp->phy_mode == PHY_INTERFACE_MODE_1000BASEX ||
> + lp->phy_mode == PHY_INTERFACE_MODE_2500BASEX) {
> np = of_parse_phandle(pdev->dev.of_node, "pcs-handle", 0);
> if (!np) {
> /* Deprecated: Always use "pcs-handle" for pcs_phy.
> @@ -2882,8 +2891,13 @@ static int axienet_probe(struct platform_device *pdev)
>
> lp->phylink_config.dev = &ndev->dev;
> lp->phylink_config.type = PHYLINK_NETDEV;
> - lp->phylink_config.mac_capabilities = MAC_SYM_PAUSE |
> MAC_ASYM_PAUSE |
> - MAC_10FD | MAC_100FD | MAC_1000FD;
> + lp->phylink_config.mac_capabilities = MAC_SYM_PAUSE |
> MAC_ASYM_PAUSE;
> +
> + /* Set MAC capabilities based on MAC type */
> + if (lp->max_speed == SPEED_1000)
> + lp->phylink_config.mac_capabilities |= MAC_10FD | MAC_100FD |
> MAC_1000FD;
> + else
> + lp->phylink_config.mac_capabilities |= MAC_2500FD;
>
> __set_bit(lp->phy_mode, lp->phylink_config.supported_interfaces);
> if (lp->switch_x_sgmii) {
> --
> 2.25.1
Powered by blists - more mailing lists