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Message-ID: <603407a6-93c7-4d45-b171-7bbc871a3569@linaro.org>
Date: Mon, 18 Nov 2024 15:22:01 +0000
From: Tudor Ambarus <tudor.ambarus@...aro.org>
To: Jassi Brar <jassisinghbrar@...il.com>
Cc: krzk@...nel.org, alim.akhtar@...sung.com, mst@...hat.com,
javierm@...hat.com, tzimmermann@...e.de, bartosz.golaszewski@...aro.org,
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Arnd Bergmann <arnd@...db.de>
Subject: Re: [PATCH v2 1/2] mailbox: add async request mechanism to empower
controllers w/ hw queues
Hi, Jassi,
Sorry for the late reply, I was off for a while.
On 10/29/24 3:59 PM, Jassi Brar wrote:
>>> If your usecase is not currently handled, please let me know. We can
>>> discuss that.
>> It's not handled. I have a list of requirements I have to fulfill which
>> are not covered by the mailbox core:
>>
>> 1/ allow multiple TX in-flight. We need to let the controller handle its
>> hardware queue, otherwise the hardware queue has no sense at all.
>>
> As I said this one is currently handled by assuming TX-done by
> depositing in the h/w queue/fifo.
This may work indeed. I would have a TXDONE_BY_ACK controller. Its
`.send_data` would be a one liner, where I just raise the interrupt to
the firmware. TX ring would be written by `cl->tx_prepare()`.
Then in the protocol driver I would do:
ret = mbox_send_message(mbox_chan, msg);
if (ret < 0)
return ret;
/* TX-done when depositing in the h/w queue. */
mbox_client_txdone(mbox_chan, 0);
ret = exynos_acpm_wait_for_message_response(mbox_chan, msg);
if (ret)
return ret;
> You will have the same perf as with your attempt to have "multiple
I'm still forced to pass all the messages to the mailbox's core software
queue. I also don't need the locking from the core. For my case the mbox
core just needs to do:
if (chan->cl->tx_prepare)
chan->cl->tx_prepare(chan->cl, data);
return chan->mbox->ops->send_data(chan, data);
Would it make sense to introduce such a method?
BTW, what are the minimum requirements for a controller to be considered
a mailbox controller? As you saw, I'm using the mailbox controller just
to raise the interrupt to the firmware, no messages are written to the
controller's buffers.
Does message size matter? On my device the ACPM protocol is using
messages of 0, 2, 16 or 32 bytes, but it also allows the possibility to
pass a pointer to an indirection command SRAM buffer, where one is able
to write up to 412 bytes.
> in-flight" while neither of these approaches handles in-flight
> failures. We can discuss this.
Do you mean that there's no retry mechanism? The crypto subsystem has
one, we may look at what's done there if we care.
>
>> 2/ allow to tie a TX to a RX. I need to know to what TX the response
>> corresponds to.
>> 3/ allow multiple clients to the same channel. ACPM allows this. Support
>> would have come as an extra patch.
>>
> These are nothing new. A few other platforms too have shared channels
> and that is implemented above the mailbox.
>
okay
>> 4/ allow polling and IRQ channels for the same mailbox controller (not
>> urgent).
>>
> It is very easy to populate them as separate controllers.
Do you mean to call devm_mbox_controller_register() twice for the same dev?
Thanks,
ta
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