linux-kernel - Re: [PATCH 1/5] dt-bindings: display: vop2: Add optional PLL clock properties

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Message-ID: <173203649757.1839089.16877007589155949446.robh@kernel.org>
Date: Tue, 19 Nov 2024 11:14:58 -0600
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
Cc: Thomas Zimmermann <tzimmermann@...e.de>,
	Maxime Ripard <mripard@...nel.org>,
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
	David Airlie <airlied@...il.com>, devicetree@...r.kernel.org,
	kernel@...labora.com, Sandy Huang <hjc@...k-chips.com>,
	linux-arm-kernel@...ts.infradead.org,
	dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
	linux-rockchip@...ts.infradead.org,
	Conor Dooley <conor+dt@...nel.org>,
	Heiko Stübner <heiko@...ech.de>,
	Andy Yan <andy.yan@...k-chips.com>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Simona Vetter <simona@...ll.ch>
Subject: Re: [PATCH 1/5] dt-bindings: display: vop2: Add optional PLL clock
 properties


On Sat, 16 Nov 2024 20:22:32 +0200, Cristian Ciocaltea wrote:
> On RK3588, HDMI PHY PLL can be used as an alternative and more accurate
> pixel clock source for VOP2 video ports 0, 1 and 2.
> 
> Document the optional PLL clock properties corresponding to the two HDMI
> PHYs available on the SoC.
> 
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
> ---
>  Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml | 4 ++++
>  1 file changed, 4 insertions(+)
> 

Acked-by: Rob Herring (Arm) <robh@...nel.org>