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Message-ID: <20241119171037.53zxi47u643zztvx@thinkpad> Date: Tue, 19 Nov 2024 22:40:37 +0530 From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org> To: Mayank Rana <quic_mrana@...cinc.com> Cc: jingoohan1@...il.com, will@...nel.org, lpieralisi@...nel.org, kw@...ux.com, robh@...nel.org, bhelgaas@...gle.com, krzk@...nel.org, linux-pci@...r.kernel.org, linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org, quic_krichai@...cinc.com Subject: Re: [PATCH v3 0/4] Add Qualcomm SA8255p based firmware managed PCIe root complex On Fri, Nov 15, 2024 at 10:31:17AM -0800, Mayank Rana wrote: > > > On 11/15/2024 3:28 AM, Manivannan Sadhasivam wrote: > > On Wed, Nov 06, 2024 at 02:13:37PM -0800, Mayank Rana wrote: > > > Based on received feedback, this patch series adds support with existing > > > Linux qcom-pcie.c driver to get PCIe host root complex functionality on > > > Qualcomm SA8255P auto platform. > > > > > > 1. Interface to allow requesting firmware to manage system resources and > > > performing PCIe Link up (devicetree binding in terms of power domain and > > > runtime PM APIs is used in driver) > > > > > > 2. SA8255P is using Synopsys Designware PCIe controller which supports MSI > > > controller. Using existing MSI controller based functionality by exporting > > > important pcie dwc core driver based MSI APIs, and using those from > > > pcie-qcom.c driver. > > > > > > Below architecture is used on Qualcomm SA8255P auto platform to get ECAM > > > compliant PCIe controller based functionality. Here firmware VM based PCIe > > > driver takes care of resource management and performing PCIe link related > > > handling (D0 and D3cold). Linux pcie-qcom.c driver uses power domain to > > > request firmware VM to perform these operations using SCMI interface. > > > -------------------- > > > > > > > > > ┌────────────────────────┐ > > > │ │ > > > ┌──────────────────────┐ │ SHARED MEMORY │ ┌──────────────────────────┐ > > > │ Firmware VM │ │ │ │ Linux VM │ > > > │ ┌─────────┐ │ │ │ │ ┌────────────────┐ │ > > > │ │ Drivers │ ┌──────┐ │ │ │ │ │ PCIE Qcom │ │ > > > │ │ PCIE PHY◄─┤ │ │ │ ┌────────────────┐ │ │ │ driver │ │ > > > │ │ │ │ SCMI │ │ │ │ │ │ │ │ │ │ > > > │ │PCIE CTL │ │ │ ├─────────┼───► PCIE ◄───┼─────┐ │ └──┬──────────▲──┘ │ > > > │ │ ├─►Server│ │ │ │ SHMEM │ │ │ │ │ │ │ > > > │ │Clk, Vreg│ │ │ │ │ │ │ │ │ │ ┌──▼──────────┴──┐ │ > > > │ │GPIO,GDSC│ └─▲──┬─┘ │ │ └────────────────┘ │ └──────┼────┤PCIE SCMI Inst │ │ > > > │ └─────────┘ │ │ │ │ │ │ └──▲──────────┬──┘ │ > > > │ │ │ │ │ │ │ │ │ │ > > > └───────────────┼──┼───┘ │ │ └───────┼──────────┼───────┘ > > > │ │ │ │ │ │ > > > │ │ └────────────────────────┘ │ │ > > > │ │ │ │ > > > │ │ │ │ > > > │ │ │ │ > > > │ │ │IRQ │HVC > > > IRQ │ │HVC │ │ > > > │ │ │ │ > > > │ │ │ │ > > > │ │ │ │ > > > ┌─────────────────┴──▼───────────────────────────────────────────────────────────┴──────────▼──────────────┐ > > > │ │ > > > │ │ > > > │ HYPERVISOR │ > > > │ │ > > > │ │ > > > │ │ > > > └──────────────────────────────────────────────────────────────────────────────────────────────────────────┘ > > > ┌─────────────┐ ┌─────────────┐ ┌──────────┐ ┌───────────┐ ┌─────────────┐ ┌────────────┐ > > > │ │ │ │ │ │ │ │ │ PCIE │ │ PCIE │ > > > │ CLOCK │ │ REGULATOR │ │ GPIO │ │ GDSC │ │ PHY │ │ controller │ > > > └─────────────┘ └─────────────┘ └──────────┘ └───────────┘ └─────────────┘ └────────────┘ > > > > Thanks a lot for working on this Mayank! This version looks good to me. I've > > left some comments, nothing alarming though. > Thanks for reviewing change. I would address those in next patchset. > > > But I do want to hold up this series until we finalize the SCMI based design. > ok. I want to send these changes which are prepared based on previously > provided feedback, to see if we have any major concern here in terms of > getting functionality. > That's fine. My comment was a note to the maintainers. - Mani -- மணிவண்ணன் சதாசிவம்
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