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Message-Id: <20241119-lxa-tac-gen3-v1-5-e0ab0a369372@pengutronix.de>
Date: Tue, 19 Nov 2024 12:35:02 +0100
From: Marc Kleine-Budde <mkl@...gutronix.de>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>
Cc: kernel@...gutronix.de, devicetree@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Marc Kleine-Budde <mkl@...gutronix.de>,
Leonard Göhrs <l.goehrs@...gutronix.de>
Subject: [PATCH 5/6] ARM: dts: stm32: lxa-tac: move adc and gpio{e,g} to
gen{1,2} boards
From: Leonard Göhrs <l.goehrs@...gutronix.de>
This is a preparation patch in order to add lxa-tac generation 3
board.
As the gen3 board has a different adc and gpio{e,g} setups, move these
from the stm32mp15xc-lxa-tac.dtsi to the gen{1,2}.dts files.
Signed-off-by: Leonard Göhrs <l.goehrs@...gutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@...gutronix.de>
---
arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts | 84 +++++++++++++++++++++++
arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts | 84 +++++++++++++++++++++++
arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi | 84 -----------------------
3 files changed, 168 insertions(+), 84 deletions(-)
diff --git a/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts b/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts
index 81f254fb88b0aba915696d5b14e9a001baa66e67..e72e42eb0eb40efe480ae2c660bc6d13e49b091e 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen1.dts
@@ -35,6 +35,76 @@ reg_iobus_12v: regulator-iobus-12v {
};
};
+&adc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&adc1_ain_pins_a>;
+ vdd-supply = <&vdd>;
+ vdda-supply = <&vdda>;
+ vref-supply = <&vrefbuf>;
+ status = "okay";
+
+ adc1: adc@0 {
+ st,adc-channels = <0 1 2 5 9 10 13 15>;
+ st,min-sample-time-nsecs = <5000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ channel@0 {
+ reg = <0>;
+ label = "HOST_2_CURR_FB";
+ };
+
+ channel@1 {
+ reg = <1>;
+ label = "HOST_3_CURR_FB";
+ };
+
+ channel@2 {
+ reg = <2>;
+ label = "OUT_0_FB";
+ };
+
+ channel@5 {
+ reg = <5>;
+ label = "IOBUS_CURR_FB";
+ };
+
+ channel@9 {
+ reg = <9>;
+ label = "IOBUS_VOLT_FB";
+ };
+
+ channel@10 {
+ reg = <10>;
+ label = "OUT_1_FB";
+ };
+
+ channel@13 {
+ reg = <13>;
+ label = "HOST_CURR_FB";
+ };
+
+ channel@15 {
+ reg = <15>;
+ label = "HOST_1_CURR_FB";
+ };
+ };
+
+ adc2: adc@100 {
+ st,adc-channels = <12>;
+ st,min-sample-time-nsecs = <500000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ channel@12 {
+ reg = <12>;
+ label = "TEMP_INTERNAL";
+ };
+ };
+};
+
&gpioa {
gpio-line-names = "", "", "STACK_CS2", "", "STACK_CS3", /* 0 */
"ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */
@@ -48,6 +118,20 @@ &gpioc {
"", ""; /* 10 */
};
+&gpioe {
+ gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /* 0 */
+ "", "", "USER_BTN2", "TP48", "UART_TX_EN", /* 5 */
+ "UART_RX_EN", "TP24", "", "TP25", "TP26", /* 10 */
+ "TP27"; /* 15 */
+};
+
+&gpiog {
+ gpio-line-names = "ETH_RESET", "", "", "", "", /* 0 */
+ "IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /* 5 */
+ "TP49", "", "", "", "", /* 10 */
+ ""; /* 15 */
+};
+
&gpu {
status = "disabled";
};
diff --git a/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts b/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts
index 4cc1770316619deb619326ffe3448502e2e4d7be..2ae281725a486a9ef0fd9e52dfdb6a92e319c508 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-lxa-tac-gen2.dts
@@ -121,6 +121,76 @@ led-15 {
};
};
+&adc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&adc1_ain_pins_a>;
+ vdd-supply = <&vdd>;
+ vdda-supply = <&vdda>;
+ vref-supply = <&vrefbuf>;
+ status = "okay";
+
+ adc1: adc@0 {
+ st,adc-channels = <0 1 2 5 9 10 13 15>;
+ st,min-sample-time-nsecs = <5000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ channel@0 {
+ reg = <0>;
+ label = "HOST_2_CURR_FB";
+ };
+
+ channel@1 {
+ reg = <1>;
+ label = "HOST_3_CURR_FB";
+ };
+
+ channel@2 {
+ reg = <2>;
+ label = "OUT_0_FB";
+ };
+
+ channel@5 {
+ reg = <5>;
+ label = "IOBUS_CURR_FB";
+ };
+
+ channel@9 {
+ reg = <9>;
+ label = "IOBUS_VOLT_FB";
+ };
+
+ channel@10 {
+ reg = <10>;
+ label = "OUT_1_FB";
+ };
+
+ channel@13 {
+ reg = <13>;
+ label = "HOST_CURR_FB";
+ };
+
+ channel@15 {
+ reg = <15>;
+ label = "HOST_1_CURR_FB";
+ };
+ };
+
+ adc2: adc@100 {
+ st,adc-channels = <12>;
+ st,min-sample-time-nsecs = <500000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ channel@12 {
+ reg = <12>;
+ label = "TEMP_INTERNAL";
+ };
+ };
+};
+
&gpioa {
gpio-line-names = "", "", "DUT_PWR_EN", "", "STACK_CS3", /* 0 */
"ETH_GPIO1", "ETH_INT", "", "", "", /* 5 */
@@ -134,6 +204,20 @@ &gpioc {
"", ""; /* 10 */
};
+&gpioe {
+ gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /* 0 */
+ "", "", "USER_BTN2", "TP48", "UART_TX_EN", /* 5 */
+ "UART_RX_EN", "TP24", "", "TP25", "TP26", /* 10 */
+ "TP27"; /* 15 */
+};
+
+&gpiog {
+ gpio-line-names = "ETH_RESET", "", "", "", "", /* 0 */
+ "IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /* 5 */
+ "TP49", "", "", "", "", /* 10 */
+ ""; /* 15 */
+};
+
&gpu {
status = "disabled";
};
diff --git a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi
index d9b9d611a41e8b4ca35ab771d26fdf9067d73814..be0c355d3105b89d4374d4f6972c7927970f06b1 100644
--- a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi
@@ -150,76 +150,6 @@ output-vuart {
baseboard_eeprom: &sip_eeprom {
};
-&adc {
- pinctrl-names = "default";
- pinctrl-0 = <&adc1_ain_pins_a>;
- vdd-supply = <&vdd>;
- vdda-supply = <&vdda>;
- vref-supply = <&vrefbuf>;
- status = "okay";
-
- adc1: adc@0 {
- st,adc-channels = <0 1 2 5 9 10 13 15>;
- st,min-sample-time-nsecs = <5000>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- channel@0 {
- reg = <0>;
- label = "HOST_2_CURR_FB";
- };
-
- channel@1 {
- reg = <1>;
- label = "HOST_3_CURR_FB";
- };
-
- channel@2 {
- reg = <2>;
- label = "OUT_0_FB";
- };
-
- channel@5 {
- reg = <5>;
- label = "IOBUS_CURR_FB";
- };
-
- channel@9 {
- reg = <9>;
- label = "IOBUS_VOLT_FB";
- };
-
- channel@10 {
- reg = <10>;
- label = "OUT_1_FB";
- };
-
- channel@13 {
- reg = <13>;
- label = "HOST_CURR_FB";
- };
-
- channel@15 {
- reg = <15>;
- label = "HOST_1_CURR_FB";
- };
- };
-
- adc2: adc@100 {
- st,adc-channels = <12>;
- st,min-sample-time-nsecs = <500000>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- channel@12 {
- reg = <12>;
- label = "TEMP_INTERNAL";
- };
- };
-};
-
&crc1 {
status = "okay";
};
@@ -273,13 +203,6 @@ &gpiod {
"ETH_LAB_LEDRN"; /* 15 */
};
-&gpioe {
- gpio-line-names = "TP35", "", "", "", "CAN_1_120R", /* 0 */
- "", "", "USER_BTN2", "TP48", "UART_TX_EN", /* 5 */
- "UART_RX_EN", "TP24", "", "TP25", "TP26", /* 10 */
- "TP27"; /* 15 */
-};
-
&gpiof {
gpio-line-names = "TP36", "TP37", "", "", "OLED_CS", /* 0 */
"", "", "", "", "", /* 5 */
@@ -287,13 +210,6 @@ &gpiof {
""; /* 15 */
};
-&gpiog {
- gpio-line-names = "ETH_RESET", "", "", "", "", /* 0 */
- "IOBUS_FLT_FB", "", "USER_LED2", "ETH1_PPS_A", "CAN_0_120R", /* 5 */
- "TP49", "", "", "", "", /* 10 */
- ""; /* 15 */
-};
-
&gpioh {
gpio-line-names = "", "", "OUT_1", "OUT_0", "OLED_RESET", /* 0 */
"", "", "", "", "", /* 5 */
--
2.45.2
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