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Message-ID: <20241120063701.8194-2-friday.yang@mediatek.com>
Date: Wed, 20 Nov 2024 14:36:38 +0800
From: Friday Yang <friday.yang@...iatek.com>
To: Yong Wu <yong.wu@...iatek.com>, Krzysztof Kozlowski <krzk@...nel.org>, Rob
Herring <robh@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Matthias
Brugger <matthias.bgg@...il.com>, AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>, Philipp Zabel
<p.zabel@...gutronix.de>
CC: <linux-mediatek@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>, Friday Yang
<friday.yang@...iatek.com>
Subject: [PATCH v2 1/2] dt-bindings: memory: mediatek: Add SMI reset and clamp related property
On the MediaTek platform, some SMI LARBs are directly linked to SMI
Common. While some SMI LARBs are linked to SMI Sub Common, then SMI
Sub Common is linked to SMI Common. The hardware block diagram could
be described as below.
Add 'resets' and 'reset-names' for SMI LARBs to support SMI reset
and clamp operation. The SMI reset driver could get the reset signal
through the two properties.
SMI-Common(Smart Multimedia Interface Common)
|
+----------------+------------------+
| | |
| | |
| | |
| | |
| | |
larb0 SMI-Sub-Common0 SMI-Sub-Common1
| | | | |
larb1 larb2 larb3 larb7 larb9
Signed-off-by: Friday Yang <friday.yang@...iatek.com>
---
Although this can pass the dtbs_check, maybe there is a better way
to describe the requirements for 'resets' and 'reset-names' in bindings.
But I don't find a better way to describe it that only SMI larbs located
in camera and image subsys requires the 'resets' and 'reset-names'.
I would appreciate it if you could give some suggestions.
.../mediatek,smi-common.yaml | 2 +
.../memory-controllers/mediatek,smi-larb.yaml | 53 +++++++++++++++----
2 files changed, 44 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
index 2f36ac23604c..4392d349878c 100644
--- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
@@ -39,6 +39,7 @@ properties:
- mediatek,mt8186-smi-common
- mediatek,mt8188-smi-common-vdo
- mediatek,mt8188-smi-common-vpp
+ - mediatek,mt8188-smi-sub-common
- mediatek,mt8192-smi-common
- mediatek,mt8195-smi-common-vdo
- mediatek,mt8195-smi-common-vpp
@@ -107,6 +108,7 @@ allOf:
compatible:
contains:
enum:
+ - mediatek,mt8188-smi-sub-common
- mediatek,mt8195-smi-sub-common
then:
required:
diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
index 2381660b324c..302c0f93b49d 100644
--- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
@@ -69,6 +69,18 @@ properties:
description: the hardware id of this larb. It's only required when this
hardware id is not consecutive from its M4U point of view.
+ resets:
+ maxItems: 1
+ description: This contains a phandle to the reset controller node and an index
+ to a reset signal. SMI larbs need to get the reset controller by the node.
+ SMI could get the reset signal by the index number defined in the header
+ include/dt-bindings/reset/mt8188-resets.h.
+
+ reset-names:
+ const: larb
+ description: The name of reset controller. SMI driver need to obtain the
+ reset controller based on this.
+
required:
- compatible
- reg
@@ -125,19 +137,38 @@ allOf:
required:
- mediatek,larb-id
+ - if: # only for camera and image subsys
+ properties:
+ mediatek,smi:
+ contains:
+ enum:
+ - smi_sub_common_img0_4x1
+ - smi_sub_common_img1_4x1
+ - smi_sub_common_cam_5x1
+ - smi_sub_common_cam_8x1
+
+ then:
+ required:
+ - resets
+ - reset-names
+
additionalProperties: false
examples:
- |+
- #include <dt-bindings/clock/mt8173-clk.h>
- #include <dt-bindings/power/mt8173-power.h>
-
- larb1: larb@...10000 {
- compatible = "mediatek,mt8173-smi-larb";
- reg = <0x16010000 0x1000>;
- mediatek,smi = <&smi_common>;
- power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>;
- clocks = <&vdecsys CLK_VDEC_CKEN>,
- <&vdecsys CLK_VDEC_LARB_CKEN>;
- clock-names = "apb", "smi";
+ #include <dt-bindings/clock/mediatek,mt8188-clk.h>
+ #include <dt-bindings/power/mediatek,mt8188-power.h>
+ #include <dt-bindings/reset/mt8188-resets.h>
+
+ larb10: smi@...20000 {
+ compatible = "mediatek,mt8188-smi-larb";
+ reg = <0 0x15120000 0 0x1000>;
+ clocks = <&imgsys CLK_IMGSYS_MAIN_DIP0>,
+ <&imgsys1_dip_top CLK_IMGSYS1_DIP_TOP_LARB10>;
+ clock-names = "apb", "smi";
+ power-domains = <&spm MT8188_POWER_DOMAIN_DIP>;
+ resets = <&imgsys1_dip_nr_rst MT8188_SMI_RST_LARB10>;
+ reset-names = "larb";
+ mediatek,larb-id = <10>;
+ mediatek,smi = <&smi_sub_common_img0_4x1>;
};
--
2.46.0
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