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Message-ID: <20241120095923.1891-1-shiju.jose@huawei.com>
Date: Wed, 20 Nov 2024 09:59:10 +0000
From: <shiju.jose@...wei.com>
To: <linux-edac@...r.kernel.org>, <linux-cxl@...r.kernel.org>,
	<mchehab@...nel.org>, <dave.jiang@...el.com>, <dan.j.williams@...el.com>,
	<jonathan.cameron@...wei.com>, <alison.schofield@...el.com>,
	<nifan.cxl@...il.com>, <vishal.l.verma@...el.com>, <ira.weiny@...el.com>,
	<dave@...olabs.net>
CC: <linux-kernel@...r.kernel.org>, <linuxarm@...wei.com>,
	<tanxiaofei@...wei.com>, <prime.zeng@...ilicon.com>, <shiju.jose@...wei.com>
Subject: [PATCH 00/13] rasdaemon: cxl: Update CXL event logging and recording to CXL spec rev 3.1

From: Shiju Jose <shiju.jose@...wei.com>

1. Update CXL event logging and recording for CXL spec rev 3.1 and for the
following and corresponding kernel CXL trace events changes.
https://lore.kernel.org/lkml/20241120093745.1847-1-shiju.jose@huawei.com/

2. Add following fixes.
 - Fix logging of memory event type field of DRAM trace event.
 - Fix mismatch in 'region' field's name with that in kernel DRAM trace
   event.

Shiju Jose (13):
  rasdaemon: cxl: Fix logging of memory event type of DRAM trace event
  rasdaemon: cxl: Fix mismatch in region field's name with kernel DRAM
    trace event
  rasdaemon: cxl: Add automatic indexing for storing CXL fields in
    SQLite database
  rasdaemon: cxl: Update common event to CXL spec rev 3.1
  rasdaemon: cxl: Add Component Identifier formatting for CXL spec rev
    3.1
  rasdaemon: cxl: Update CXL general media event to CXL spec rev 3.1
  rasdaemon: cxl: Update CXL DRAM event to CXL spec rev 3.1
  rasdaemon: cxl: Update memory module event to CXL spec rev 3.1
  rasdaemon: ras-mc-ctl: Fix logging of memory event type in CXL DRAM
    error table
  rasdaemon: ras-mc-ctl: Update logging of common event data to align
    with CXL spec rev 3.1
  rasdaemon: ras-mc-ctl: Update logging of CXL general media event data
    to align with CXL spec rev 3.1
  rasdaemon: ras-mc-ctl: Update logging of CXL DRAM event data to align
    with CXL spec rev 3.1
  rasdaemon: ras-mc-ctl: Update logging of CXL memory module data to
    align with CXL spec rev 3.1

 ras-cxl-handler.c  | 262 ++++++++++++++++++++++++++++++++++++++++++---
 ras-record.c       | 181 ++++++++++++++++++++-----------
 ras-record.h       |  21 ++++
 ras-report.c       |  30 ++++--
 util/ras-mc-ctl.in | 194 ++++++++++++++++++++++++++++-----
 5 files changed, 583 insertions(+), 105 deletions(-)

-- 
2.43.0


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