linux-kernel - Re: [PATCH v3 2/2] arm64: dts: ti: k3-am64-main: Switch ICSSG clock to core clock

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Message-ID: <9efdda6e-a401-4321-9680-905a1e70f392@phytec.de>
Date: Wed, 20 Nov 2024 13:52:58 +0100
From: Wadim Egorov <w.egorov@...tec.de>
To: MD Danish Anwar <danishanwar@...com>, <conor+dt@...nel.org>,
	<krzk+dt@...nel.org>, <robh@...nel.org>, <ssantosh@...nel.org>, <nm@...com>,
	Vignesh Raghavendra <vigneshr@...com>
CC: <srk@...com>, <devicetree@...r.kernel.org>, <kristo@...nel.org>,
	<linux-kernel@...r.kernel.org>, Roger Quadros <rogerq@...nel.org>,
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v3 2/2] arm64: dts: ti: k3-am64-main: Switch ICSSG clock
 to core clock



Am 13.11.24 um 12:09 schrieb MD Danish Anwar:
> ICSSG has 7 available clocks per instance. Add all the cloks to ICSSG
> nodes. ICSSG currently uses ICSSG_ICLK (clk id 20) which operates at
> 250MHz. Switch ICSSG clock to ICSSG_CORE clock (clk id 0) which operates at
> 333MHz.
> 
> ICSSG_CORE clock will help get the most out of ICSSG as more cycles are
> needed to fully support all ICSSG features.
> 
> This commit also changes assigned-clock-parents of coreclk-mux to
> ICSSG_CORE clock from ICSSG_ICLK.
> 
> Performance update in dual mac mode
>    With ICSSG_CORE Clk @ 333MHz
>      Tx throughput - 934 Mbps
>      Rx throughput - 914 Mbps,
> 
>    With ICSSG_ICLK clk @ 250MHz,
>      Tx throughput - 920 Mbps
>      Rx throughput - 706 Mbps

I can see similar improvements. Thank you.

> 
> Signed-off-by: MD Danish Anwar <danishanwar@...com>

Tested on a phyBOARD-Electra-AM64x board,

Tested-by: Wadim Egorov <w.egorov@...tec.de>